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[60.250.196.139]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-38fede7ad70sm864284a91.15.2026.08.04.00.33.47 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 04 Aug 2026 00:33:49 -0700 (PDT) Message-ID: <6acfb226-e63a-4c41-b67e-8d8e6bf93b2d@gmail.com> Date: Tue, 4 Aug 2026 15:33:46 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 1/2] dt-bindings: spi: nuvoton,ma35d1-qspi: Allow additional GPIO chip selects To: Krzysztof Kozlowski Cc: broonie@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, cwweng@nuvoton.com References: <5769eae0-1b40-419f-8311-0d919bf619fa@sirena.org.uk> <20260803074913.1656675-1-cwweng.linux@gmail.com> <20260803074913.1656675-2-cwweng.linux@gmail.com> <20260804-smilodon-of-imminent-recreation-aa579b@quoll> Content-Language: en-US From: Chi-Wen Weng In-Reply-To: <20260804-smilodon-of-imminent-recreation-aa579b@quoll> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Krzysztof Kozlowski 於 2026/8/4 下午 03:05 寫道: > On Mon, Aug 03, 2026 at 03:49:12PM +0800, Chi-Wen Weng wrote: >> From: Chi-Wen Weng >> >> The MA35D1 QSPI controller provides two native chip selects, but the >> generic SPI controller binding defines num-cs as the total number of >> native and GPIO-based chip selects. >> >> Remove the maximum value of two from num-cs so that board device trees >> can describe additional GPIO chip selects while retaining two as the >> default chip-select count. >> >> Signed-off-by: Chi-Wen Weng >> --- >> Documentation/devicetree/bindings/spi/nuvoton,ma35d1-qspi.yaml | 1 - >> 1 file changed, 1 deletion(-) >> >> diff --git a/Documentation/devicetree/bindings/spi/nuvoton,ma35d1-qspi.yaml b/Documentation/devicetree/bindings/spi/nuvoton,ma35d1-qspi.yaml >> index 377ccf4fb224..f837367e6d5f 100644 >> --- a/Documentation/devicetree/bindings/spi/nuvoton,ma35d1-qspi.yaml >> +++ b/Documentation/devicetree/bindings/spi/nuvoton,ma35d1-qspi.yaml >> @@ -30,7 +30,6 @@ properties: >> >> num-cs: >> minimum: 1 >> - maximum: 2 >> default: 2 > Isn't num-cs the number of native chip selects? > > Best regards, > Krzysztof Hi Krzysztof, Yes, you are right. I interpreted num-cs as the final number of native and GPIO chip selects based on the generic binding description. However, the native chip-select count should remain two here, and the SPI core will expand num_chipselect automatically when the cs-gpios array contains additional entries. Therefore, the maximum value of two should remain in the MA35D1 binding. I will drop this binding change. Thanks for the clarification. Best regards, Chi-Wen