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From: CK Hu <ck.hu@mediatek.com>
To: Rex-BC Chen <rex-bc.chen@mediatek.com>, <chunkuang.hu@kernel.org>,
	<p.zabel@pengutronix.de>, <daniel@ffwll.ch>, <robh+dt@kernel.org>,
	<krzysztof.kozlowski+dt@linaro.org>, <matthias.bgg@gmail.com>,
	<airlied@linux.ie>
Cc: <msp@baylibre.com>, <granquet@baylibre.com>,
	<jitao.shi@mediatek.com>, <wenst@chromium.org>,
	<angelogioacchino.delregno@collabora.com>,
	<dri-devel@lists.freedesktop.org>,
	<linux-mediatek@lists.infradead.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<Project_Global_Chrome_Upstream_Group@mediatek.com>
Subject: Re: [PATCH v12 11/14] drm/mediatek: dpi: Add tvd_clk enable/disable flow
Date: Tue, 21 Jun 2022 11:45:29 +0800	[thread overview]
Message-ID: <6af179e2995ce2f4f2e7c72f10516afb0c1604a3.camel@mediatek.com> (raw)
In-Reply-To: <7bffe5226a80474f150ef67e36d2b75ea8e8a9d8.camel@mediatek.com>

On Tue, 2022-06-21 at 11:11 +0800, Rex-BC Chen wrote:
> On Tue, 2022-06-21 at 10:55 +0800, CK Hu wrote:
> > Hi, Bo-Chen:
> > 
> > On Mon, 2022-06-20 at 20:10 +0800, Bo-Chen Chen wrote:
> > > We should enable/disable tvd_clk when power_on/power_off, so add
> > > this
> > > patch to do this.
> > 
> > Without this patch, what would happen?
> > It seems this patch is redundant for these SoCs:
> > 
> > static const struct of_device_id mtk_dpi_of_ids[] = {
> > 	{ .compatible = "mediatek,mt2701-dpi",
> > 	  .data = &mt2701_conf,
> > 	},
> > 	{ .compatible = "mediatek,mt8173-dpi",
> > 	  .data = &mt8173_conf,
> > 	},
> > 	{ .compatible = "mediatek,mt8183-dpi",
> > 	  .data = &mt8183_conf,
> > 	},
> > 	{ .compatible = "mediatek,mt8192-dpi",
> > 	  .data = &mt8192_conf,
> > 	},
> > 	{ },
> > };
> > 
> > Regards,
> > CK
> > 
> 
> Hello CK,
> 
> IMO, this is a bug fix patch. From the usage of clock, if we want to
> use it, we should enable it . Therefore, I think we should add this
> and
> I will add a fix tag for this patch.

I think mt8173 chromebook use this driver for HDMI output. So mt8173
chromebook HDMI could not work normally?

Regards,
CK

> 
> BRs,
> Bo-Chen
> > 
> > > 
> > > Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
> > > ---
> > >  drivers/gpu/drm/mediatek/mtk_dpi.c | 11 ++++++++++-
> > >  1 file changed, 10 insertions(+), 1 deletion(-)
> > > 
> > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c
> > > b/drivers/gpu/drm/mediatek/mtk_dpi.c
> > > index 2717b1741b7a..f83ecb154457 100644
> > > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> > > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> > > @@ -455,6 +455,7 @@ static void mtk_dpi_power_off(struct mtk_dpi
> > > *dpi)
> > >  	mtk_dpi_disable(dpi);
> > >  	clk_disable_unprepare(dpi->pixel_clk);
> > >  	clk_disable_unprepare(dpi->engine_clk);
> > > +	clk_disable_unprepare(dpi->tvd_clk);
> > >  }
> > >  
> > >  static int mtk_dpi_power_on(struct mtk_dpi *dpi)
> > > @@ -464,10 +465,16 @@ static int mtk_dpi_power_on(struct mtk_dpi
> > > *dpi)
> > >  	if (++dpi->refcount != 1)
> > >  		return 0;
> > >  
> > > +	ret = clk_prepare_enable(dpi->tvd_clk);
> > > +	if (ret) {
> > > +		dev_err(dpi->dev, "Failed to enable tvd pll: %d\n",
> > > ret);
> > > +		goto err_refcount;
> > > +	}
> > > +
> > >  	ret = clk_prepare_enable(dpi->engine_clk);
> > >  	if (ret) {
> > >  		dev_err(dpi->dev, "Failed to enable engine clock:
> > > %d\n", ret);
> > > -		goto err_refcount;
> > > +		goto err_engine;
> > >  	}
> > >  
> > >  	ret = clk_prepare_enable(dpi->pixel_clk);
> > > @@ -484,6 +491,8 @@ static int mtk_dpi_power_on(struct mtk_dpi
> > > *dpi)
> > >  
> > >  err_pixel:
> > >  	clk_disable_unprepare(dpi->engine_clk);
> > > +err_engine:
> > > +	clk_disable_unprepare(dpi->tvd_clk);
> > >  err_refcount:
> > >  	dpi->refcount--;
> > >  	return ret;
> > 
> > 
> 
> 


  reply	other threads:[~2022-06-21  3:45 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-20 12:10 [PATCH v12 00/14] drm/mediatek: Add MT8195 dp_intf driver Bo-Chen Chen
2022-06-20 12:10 ` [PATCH v12 01/14] dt-bindings: mediatek,dpi: Add DP_INTF compatible Bo-Chen Chen
2022-06-20 12:25   ` Maxime Ripard
2022-06-20 12:33     ` Rex-BC Chen
2022-06-20 12:10 ` [PATCH v12 02/14] drm/mediatek: dpi: Add support for quantization range Bo-Chen Chen
2022-06-21  1:40   ` CK Hu
2022-06-20 12:10 ` [PATCH v12 03/14] drm/mediatek: dpi: implement a CK/DE pol toggle in SoC config Bo-Chen Chen
2022-06-20 12:10 ` [PATCH v12 04/14] drm/mediatek: dpi: implement a swap_input " Bo-Chen Chen
2022-06-21  1:44   ` CK Hu
2022-06-20 12:10 ` [PATCH v12 05/14] drm/mediatek: dpi: move dimension mask to " Bo-Chen Chen
2022-06-20 12:10 ` [PATCH v12 06/14] drm/mediatek: dpi: move hvsize_mask " Bo-Chen Chen
2022-06-20 12:10 ` [PATCH v12 07/14] drm/mediatek: dpi: move swap_shift " Bo-Chen Chen
2022-06-20 12:10 ` [PATCH v12 08/14] drm/mediatek: dpi: move the yuv422_en_bit " Bo-Chen Chen
2022-06-20 12:10 ` [PATCH v12 09/14] drm/mediatek: dpi: move the csc_enable bit " Bo-Chen Chen
2022-06-20 12:10 ` [PATCH v12 10/14] drm/mediatek: dpi: Add dpintf support Bo-Chen Chen
2022-06-21  2:32   ` CK Hu
2022-06-21  8:46     ` Rex-BC Chen
2022-06-20 12:10 ` [PATCH v12 11/14] drm/mediatek: dpi: Add tvd_clk enable/disable flow Bo-Chen Chen
2022-06-21  2:55   ` CK Hu
2022-06-21  3:11     ` Rex-BC Chen
2022-06-21  3:45       ` CK Hu [this message]
2022-06-21  3:50         ` Rex-BC Chen
2022-06-21  4:08           ` CK Hu
2022-06-21  5:47             ` Rex-BC Chen
2022-06-21  5:54               ` CK Hu
2022-06-21  5:59                 ` Rex-BC Chen
2022-06-20 12:10 ` [PATCH v12 12/14] drm/mediatek: dpi: Add YUV422 output support Bo-Chen Chen
2022-06-21  3:04   ` CK Hu
2022-06-21  8:39     ` Rex-BC Chen
2022-06-20 12:10 ` [PATCH v12 13/14] drm/mediatek: dpi: Only enable dpi after the bridge is enabled Bo-Chen Chen
2022-06-21  3:18   ` CK Hu
2022-06-21  6:02     ` Rex-BC Chen
2022-06-20 12:10 ` [PATCH v12 14/14] drm/mediatek: dpi: Add matrix_sel helper Bo-Chen Chen
2022-06-21  3:33   ` CK Hu
2022-06-21  8:41     ` Rex-BC Chen
2022-06-21  9:12       ` CK Hu

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