From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 058A5ECDFB0 for ; Fri, 13 Jul 2018 14:01:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id BE572208A4 for ; Fri, 13 Jul 2018 14:01:28 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org BE572208A4 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=nvidia.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729974AbeGMOQM (ORCPT ); Fri, 13 Jul 2018 10:16:12 -0400 Received: from hqemgate14.nvidia.com ([216.228.121.143]:2677 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729739AbeGMOQM (ORCPT ); Fri, 13 Jul 2018 10:16:12 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com (using TLS: TLSv1, AES128-SHA) id ; Fri, 13 Jul 2018 07:01:22 -0700 Received: from HQMAIL101.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Fri, 13 Jul 2018 07:01:25 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Fri, 13 Jul 2018 07:01:25 -0700 Received: from [10.21.132.122] (10.124.1.5) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Fri, 13 Jul 2018 14:01:23 +0000 Subject: Re: [PATCH] mmc: tegra: Add and use tegra_sdhci_get_max_clock() To: Aapo Vienamo , Ulf Hansson , Adrian Hunter , Thierry Reding , Marcel Ziswiler CC: , , References: <1531487865-17427-1-git-send-email-avienamo@nvidia.com> From: Jon Hunter Message-ID: <6af41450-4770-3b2d-05b8-914f90743a7e@nvidia.com> Date: Fri, 13 Jul 2018 15:01:21 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.8.0 MIME-Version: 1.0 In-Reply-To: <1531487865-17427-1-git-send-email-avienamo@nvidia.com> X-Originating-IP: [10.124.1.5] X-ClientProxiedBy: HQMAIL105.nvidia.com (172.20.187.12) To HQMAIL101.nvidia.com (172.20.187.10) Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 13/07/18 14:17, Aapo Vienamo wrote: > Implement and use tegra_sdhci_get_max_clock() which returns the true > maximum host clock rate. The issue with tegra_sdhci_get_max_clock() is Don't you mean sdhci_pltfm_clk_get_max_clock above? Does this function need fixing then? Or at least should there be another variant added because there is nothing Tegra specific we are doing below? > that it returns the current clock rate of the host instead of the > maximum one, which can lead to unnecessarily small clock rates. > > This differs from the previous implementation of > tegra_sdhci_get_max_clock() in that it doesn't divide the result by two. Why? Fixes tag? Cheers Jon -- nvpublic