From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752687AbdK2WSu (ORCPT ); Wed, 29 Nov 2017 17:18:50 -0500 Received: from hqemgate14.nvidia.com ([216.228.121.143]:6527 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751660AbdK2WSt (ORCPT ); Wed, 29 Nov 2017 17:18:49 -0500 X-PGP-Universal: processed; by hqpgpgate102.nvidia.com on Wed, 29 Nov 2017 14:19:30 -0800 Subject: Re: Unlock-lock questions and the Linux Kernel Memory Model To: "paulmck@linux.vnet.ibm.com" , Alan Stern CC: Peter Zijlstra , Andrea Parri , Luc Maranget , Jade Alglave , Boqun Feng , Nicholas Piggin , Will Deacon , David Howells , Palmer Dabbelt , Kernel development list References: <20171129194602.6zmjj7z5ih4ri25h@hirez.programming.kicks-ass.net> <20171129204220.GH3624@linux.vnet.ibm.com> From: Daniel Lustig Message-ID: <6b068a40-75bb-4152-b1ec-9ef3beacbdd5@nvidia.com> Date: Wed, 29 Nov 2017 14:18:48 -0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.5.0 MIME-Version: 1.0 In-Reply-To: <20171129204220.GH3624@linux.vnet.ibm.com> X-Originating-IP: [10.2.175.48] X-ClientProxiedBy: HQMAIL108.nvidia.com (172.18.146.13) To HQMAIL105.nvidia.com (172.20.187.12) Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 11/29/2017 12:42 PM, Paul E. McKenney wrote: > On Wed, Nov 29, 2017 at 02:53:06PM -0500, Alan Stern wrote: >> On Wed, 29 Nov 2017, Peter Zijlstra wrote: >> >>> On Wed, Nov 29, 2017 at 11:04:53AM -0800, Daniel Lustig wrote: >>> >>>> While we're here, let me ask about another test which isn't directly >>>> about unlock/lock but which is still somewhat related to this >>>> discussion: >>>> >>>> "MP+wmb+xchg-acq" (or some such) >>>> >>>> {} >>>> >>>> P0(int *x, int *y) >>>> { >>>> WRITE_ONCE(*x, 1); >>>> smp_wmb(); >>>> WRITE_ONCE(*y, 1); >>>> } >>>> >>>> P1(int *x, int *y) >>>> { >>>> r1 = atomic_xchg_relaxed(y, 2); >>>> r2 = smp_load_acquire(y); >>>> r3 = READ_ONCE(*x); >>>> } >>>> >>>> exists (1:r1=1 /\ 1:r2=2 /\ 1:r3=0) >>>> >>>> C/C++ would call the atomic_xchg_relaxed part of a release sequence >>>> and hence would forbid this outcome. >>> >>> That's just weird. Either its _relaxed, or its _release. Making _relaxed >>> mean _release is just daft. >> >> The C11 memory model specifically allows atomic operations to be >> interspersed within a release sequence. But it doesn't say why. > > The use case put forward within the committee is for atomic quantities > with mode bits. The most frequent has the atomic quantity having > lock-like properties, in which case you don't want to lose the ordering > effects of the lock handoff just because a mode bit got set or cleared. > Some claim to actually use something like this, but details have not > been forthcoming. > > I confess to being a bit skeptical. If the mode changes are infrequent, > the update could just as well be ordered. Aren't reference counting implementations which use memory_order_relaxed for incrementing the count another important use case? Specifically, the synchronization between a memory_order_release decrement and the eventual memory_order_acquire/consume free shouldn't be interrupted by other (relaxed) increments and (release-only) decrements that happen in between. At least that's my understanding of this use case. I wasn't there when the C/C++ committee decided this. > That said, Daniel, the C++ memory model really does require that the > above litmus test be forbidden, my denigration of it notwithstanding. Yes I agree, that's why I'm curious what the Linux memory model has in mind here :) Dan > Thanx, Paul >