From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mta1.migadu.com (out-109.mta1.migadu.com [95.215.58.109]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8CF5B489FA7 for ; Mon, 21 Sep 2026 09:31:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.109 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789983089; cv=none; b=kMX5lf0+d/QITzuwNlXb2PpFjU+E09FzyGFcgbJ3LWNAvk+n9rLExlMVAWgy8995WyRdeU5Ag0WdNSpt1TG4lKP8CbVGZyRtveuVYrQF9i2ghTTFTZBum7nvnXFWpegYNtsV+AkumPypCe+qtm3ehmDlSm/m8cmbhXT2ipDxKwA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789983089; c=relaxed/simple; bh=K1qjGmEUN9aAoDHkdXRdhQEnxRrPQ9nGfz4XoRPKfSM=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=mehh/uOW6TN1KwaMbUEjxSWCiH4sUHkTrIEDgGKaELjv3GBB5iw+Lol6r4h3y0UKNctIxWVI5ja6jkBullFbIsxMdMAg7+46ogzjNE6WIA52BrDQTit8Dl0KHrikO2zfNHX3LLbkaLZsh6PANUViAxPbTjVnRhWnFL1aCVCQa+c= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=OVbVZBXK; arc=none smtp.client-ip=95.215.58.109 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="OVbVZBXK" X-Envelope-To: linux-kernel@vger.kernel.org DKIM-Signature: a=rsa-sha256; bh=K1qjGmEUN9aAoDHkdXRdhQEnxRrPQ9nGfz4XoRPKfSM=; c=simple/simple; d=linux.dev; h=from:to:subject:date:message-id:mime-version:content-type; s=key1; t=1789983085; v=1; x=1790587885; b=OVbVZBXK+CZwqLezNpAhQQMmL2W+0+wcgVgu++3atD+i2QJaVaII/bZifvSkPR+cAfUtLdg2 +j2kNlKJrLUGG8E/LQDQbU2ur9HCv8aoDQ5kK858XZjhe1qOwPOg0MW/6Jd7s9YLWHyzicgy+PV tai1tsVTdLfieIQ1bCZhpJFw= X-Envelope-To: linux-kernel@vger.kernel.org Received: by smtp.migadu.com with ESMTPS id 830b0fab067b0897; Mon, 21 Sep 2026 09:31:25 +0000 X-Mizu-Trace-ID: 830b0fab067b0897 X-Migadu-Flow: FLOW_OUT Message-ID: <6b668efe-ef7a-474a-957c-893755ebba46@linux.dev> Date: Mon, 21 Sep 2026 17:31:17 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] irqchip/gic: Fix UBSAN shift-out-of-bounds in GIC helpers To: Zhu Ling Cc: maz@kernel.org, tglx@kernel.org, radu@rendec.net, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: <86ldjlp0qi.wl-maz@kernel.org> <20260921022101.20941-1-zhuling2709@phytium.com.cn> Content-Language: en-US From: Zenghui Yu In-Reply-To: <20260921022101.20941-1-zhuling2709@phytium.com.cn> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 9/21/26 10:21 AM, Zhu Ling wrote: > When running with UBSAN enabled, enabling a GPIO controller that uses a > GIC interrupt as its parent triggers several shift-out-of-bounds warnings: > > shift-out-of-bounds in drivers/irqchip/irq-gic-common.c:50:21 > left shift of 2 by 30 places cannot be represented in type 'int' > > Similar reports are emitted from gic_poke_irq() and gic_peek_irq() in > drivers/irqchip/irq-gic-v3.c. These masks are generated by shifting > signed integer constants, which invokes undefined behavior when bit 31 > is selected. > > Use BIT() to generate the masks with an unsigned type and make their > intent explicit. > > Signed-off-by: Zhu Ling > --- > Changes in v2: > - Use BIT() instead of explicit unsigned shifts, as suggested by Marc. > - Drop the redundant introductory text from the email. > - Update the author email address. > > Link: https://lore.kernel.org/r/2fJDwUUYdEf2_eaRa041L9xkT8RkSWFeo7euOnqMbbPhUatLlEaAvGfB6sOspDmXaxO87Eh7bQLV9UolyjbMtZBT1wB2UGypjPOo0Z-RC0Q=@proton.me > --- > drivers/irqchip/irq-gic-common.c | 2 +- > drivers/irqchip/irq-gic-v3.c | 4 ++-- > 2 files changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/irqchip/irq-gic-common.c b/drivers/irqchip/irq-gic-common.c > index c776f9142610..8bd1eaa54295 100644 > --- a/drivers/irqchip/irq-gic-common.c > +++ b/drivers/irqchip/irq-gic-common.c > @@ -48,7 +48,7 @@ void gic_enable_quirks(u32 iidr, const struct gic_quirk *quirks, > int gic_configure_irq(unsigned int irq, unsigned int type, > void __iomem *base) > { > - u32 confmask = 0x2 << ((irq % 16) * 2); > + u32 confmask = BIT(((irq % 16) * 2) + 1); > u32 confoff = (irq / 16) * 4; > u32 val, oldval; > int ret = 0; > diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c > index 6e1fa5b247fc..15110d47ddb0 100644 > --- a/drivers/irqchip/irq-gic-v3.c > +++ b/drivers/irqchip/irq-gic-v3.c > @@ -457,7 +457,7 @@ static int gic_peek_irq(struct irq_data *d, u32 offset) > u32 index, mask; > > offset = convert_offset_index(d, offset, &index); > - mask = 1 << (index % 32); > + mask = BIT(index % 32); > > if (gic_irq_in_rdist(d)) > base = gic_data_rdist_sgi_base(); > @@ -473,7 +473,7 @@ static void gic_poke_irq(struct irq_data *d, u32 offset) > u32 index, mask; > > offset = convert_offset_index(d, offset, &index); > - mask = 1 << (index % 32); > + mask = BIT(index % 32); > > if (gic_irq_in_rdist(d)) > base = gic_data_rdist_sgi_base(); gic_{poke,peek}_irq in drivers/irqchip/irq-gic.c have a similar pattern. |static void gic_poke_irq(struct irq_data *d, u32 offset) |{ | u32 mask = 1 << (irqd_to_hwirq(d) % 32); Mind fixing them as well? Thanks, Zenghui