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Wed, 21 May 2025 07:22:19 -0700 (PDT) Received: from [10.5.0.2] ([185.174.156.4]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-447f7ca2dd9sm69237755e9.37.2025.05.21.07.22.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 May 2025 07:22:18 -0700 (PDT) Message-ID: <6b72e9dc9d574aa1f025c0f5d317dcec1d729ba9.camel@gmail.com> Subject: Re: [PATCH 3/3] pwm: axi-pwmgen: add support for external clock From: Nuno =?ISO-8859-1?Q?S=E1?= To: Uwe =?ISO-8859-1?Q?Kleine-K=F6nig?= , David Lechner Cc: Michael Hennerich , Nuno =?ISO-8859-1?Q?S=E1?= , Trevor Gamblin , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Date: Wed, 21 May 2025 15:22:20 +0100 In-Reply-To: References: <20250520-pwm-axi-pwmgen-add-external-clock-v1-0-6cd63cc001c8@baylibre.com> <20250520-pwm-axi-pwmgen-add-external-clock-v1-3-6cd63cc001c8@baylibre.com> <0dd1a97e-ff7c-4d09-b18e-5df9944488c6@baylibre.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.56.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Wed, 2025-05-21 at 15:54 +0200, Uwe Kleine-K=C3=B6nig wrote: > Hello David, >=20 > On Wed, May 21, 2025 at 08:19:51AM -0500, David Lechner wrote: > > On 5/21/25 4:22 AM, Uwe Kleine-K=C3=B6nig wrote: > > > Can you achieve the same effect with the (IMHO slightly nicer but > > > hand-crafted) following patch: > > >=20 > > > =C2=A0 ddata =3D pwmchip_get_drvdata(chip); > > > =C2=A0 ddata->regmap =3D regmap; > > > =C2=A0 > > > - clk =3D devm_clk_get_enabled(dev, NULL); > > > - if (IS_ERR(clk)) > > > - return dev_err_probe(dev, PTR_ERR(clk), "failed to get > > > clock\n"); > > > + axi_clk =3D devm_clk_get_enabled(dev, "axi"); > > > + if (IS_ERR(axi_clk)) > > > + return dev_err_probe(dev, PTR_ERR(axi_clk), "failed to > > > get axi clock\n"); > > >=20 > > > + clk =3D devm_clk_get_enabled_optional(dev, "ext"); > > > + if (IS_ERR(clk)) > > > + return dev_err_probe(dev, PTR_ERR(clk), "failed to get > > > ext clock\n"); > > > + } > >=20 > > The trouble with this is that it would not work with existing .dtbs > > that don't have clock-names set. I think it would need to be more like = this: > >=20 > >=20 > > axi_clk =3D devm_clk_get_enabled(dev, NULL); > > if (IS_ERR(axi_clk)) > > return dev_err_probe(dev, PTR_ERR(axi_clk), "failed to get > > axi clock\n"); > >=20 > > clk =3D devm_clk_get_enabled_optional(dev, "ext"); > > if (IS_ERR(clk)) > > return dev_err_probe(dev, PTR_ERR(clk), "failed to get ext > > clock\n"); > >=20 > > if (!clk) > > clk =3D axi_clk > >=20 >=20 > If there are no clock-names, the parameter is ignored. (I didn't test, > only quickly checked the code.) So passing "axi" instead of NULL should > work and yield a more robust solution. >=20 >=20 Are you sure? If there are no clock-names and you pass an id, you should ge= t an error back: https://elixir.bootlin.com/linux/v6.14.7/source/drivers/clk/clk.c#L5198 I know it's not exactly the same we're discussing but of_property_match_str= ing() return -EINVAL if the property is not found which leads to an index < 0 and= thus of_parse_phandle_with_args() also returns an error back. I think I'm not missing anything but it's always a possibility. - Nuno S=C3=A1