From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1ABA1CA0FE4 for ; Fri, 1 Sep 2023 02:09:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1348131AbjIACJs (ORCPT ); Thu, 31 Aug 2023 22:09:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52850 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231261AbjIACJq (ORCPT ); Thu, 31 Aug 2023 22:09:46 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C897EE72; Thu, 31 Aug 2023 19:09:43 -0700 (PDT) Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3811uOQM014227; Fri, 1 Sep 2023 02:09:28 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=message-id : date : mime-version : subject : to : cc : references : from : in-reply-to : content-type : content-transfer-encoding; s=qcppdkim1; bh=yAe4GoLRy81ROlbPPbBzJmP1JhvJt4U/z0OjKbpd2EU=; b=PjH2jt5cP1lqlKRUVuA93c8vx5YDTPGiCxJhZEcArMYp4R8Vd/krXPIsdppZ5ioAhNTL qeypKjtazz+d+OwtIaiLkxAAnHabLe+ztWJ36sjMmg2vIPLRtzTsE4ZnQJ5N2vZTGigY gSRie4KywqL5qV+jlo96eCwzmKf8S5v3H8GWP/VmqCYgrn75vIuIRzvAXQNiZL/DdTd6 SbHUzBiHVkHBxeWFJL1KPE3hZwq0XGtWOld7BjLV4b2y2XKTrPhOKWzDNNAzTaweKAXK otvL6FUlAT4/IhfA0D6FR4N0F1UhZMWkxPrHwQkmSzDJ2ciDkdK/u6ypog2XzxN4Iv9d Sg== Received: from nalasppmta04.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3stku2aq36-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 01 Sep 2023 02:09:27 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 38129Qnb024467 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 1 Sep 2023 02:09:26 GMT Received: from [10.253.79.146] (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.30; Thu, 31 Aug 2023 19:09:21 -0700 Message-ID: <6b8ddb29-3fde-4148-392c-45b118930b46@quicinc.com> Date: Fri, 1 Sep 2023 10:09:17 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.14.0 Subject: Re: [PATCH v8 06/13] coresight-tpdm: Add reset node to TPDM node Content-Language: en-US To: Suzuki K Poulose , Mathieu Poirier , Alexander Shishkin , Konrad Dybcio , Mike Leach , Rob Herring , Krzysztof Kozlowski CC: Jinlong Mao , Leo Yan , "Greg Kroah-Hartman" , , , , , Tingwei Zhang , Yuanfang Zhang , Trilok Soni , Hao Zhang , , References: <1692681973-20764-1-git-send-email-quic_taozha@quicinc.com> <1692681973-20764-7-git-send-email-quic_taozha@quicinc.com> <46a48c06-0d6c-d943-5f20-bd0002c76342@arm.com> From: Tao Zhang In-Reply-To: <46a48c06-0d6c-d943-5f20-bd0002c76342@arm.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 7vWNc_Ba5l5WMPv7s7hO02SFRJ3BzzCz X-Proofpoint-ORIG-GUID: 7vWNc_Ba5l5WMPv7s7hO02SFRJ3BzzCz X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.601,FMLib:17.11.176.26 definitions=2023-08-31_22,2023-08-31_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 impostorscore=0 lowpriorityscore=0 mlxscore=0 malwarescore=0 spamscore=0 phishscore=0 bulkscore=0 priorityscore=1501 adultscore=0 suspectscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2308100000 definitions=main-2309010018 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 9/1/2023 4:34 AM, Suzuki K Poulose wrote: > On 22/08/2023 06:26, Tao Zhang wrote: >> TPDM device need a node to reset the configurations and status of >> it. This change provides a node to reset the configurations and >> disable the TPDM if it has been enabled. >> >> Signed-off-by: Tao Zhang >> --- >>   .../ABI/testing/sysfs-bus-coresight-devices-tpdm   | 10 ++++++++++ >>   drivers/hwtracing/coresight/coresight-tpdm.c       | 22 >> ++++++++++++++++++++++ >>   2 files changed, 32 insertions(+) >> >> diff --git >> a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm >> b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm >> index 4a58e64..2936226 100644 >> --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm >> +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm >> @@ -11,3 +11,13 @@ Description: >>           Accepts only one of the 2 values -  1 or 2. >>           1 : Generate 64 bits data >>           2 : Generate 32 bits data >> + >> +What: /sys/bus/coresight/devices//reset_dataset >> +Date:        March 2023 >> +KernelVersion    6.5 >> +Contact:    Jinlong Mao (QUIC) , Tao Zhang >> (QUIC) >> +Description: >> +        (Write) Reset the dataset of the tpdm. >> + >> +        Accepts only one value -  1. >> +        1 : Reset the dataset of the tpdm >> diff --git a/drivers/hwtracing/coresight/coresight-tpdm.c >> b/drivers/hwtracing/coresight/coresight-tpdm.c >> index 951ad4d..d6e7c8c 100644 >> --- a/drivers/hwtracing/coresight/coresight-tpdm.c >> +++ b/drivers/hwtracing/coresight/coresight-tpdm.c >> @@ -162,6 +162,27 @@ static int tpdm_datasets_setup(struct >> tpdm_drvdata *drvdata) >>       return 0; >>   } >>   +static ssize_t reset_dataset_store(struct device *dev, >> +                      struct device_attribute *attr, >> +                      const char *buf, >> +                      size_t size) >> +{ >> +    int ret = 0; >> +    unsigned long val; >> +    struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent); >> + >> +    ret = kstrtoul(buf, 0, &val); >> +    if (ret || val != 1) >> +        return -EINVAL; >> + >> +    spin_lock(&drvdata->spinlock); >> +    tpdm_reset_datasets(drvdata); >> +    spin_unlock(&drvdata->spinlock); >> + >> +    return size; >> +} >> +static DEVICE_ATTR_WO(reset_dataset); >> + >>   /* >>    * value 1: 64 bits test data >>    * value 2: 32 bits test data >> @@ -202,6 +223,7 @@ static ssize_t integration_test_store(struct >> device *dev, >>   static DEVICE_ATTR_WO(integration_test); >>     static struct attribute *tpdm_attrs[] = { >> +    &dev_attr_reset_dataset.attr, > > Should this be only visible when DSB data set is present ? This sysfs file doesn't only reset DSB dataset, and it needs to reset all the datasets the TPDM supported. So I think it should not be only visible for DSB TPDM Best, Tao > > Suzuki > >>       &dev_attr_integration_test.attr, >>       NULL, >>   }; >