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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id c11-20020a170906924b00b0098e34446464sm615265ejx.25.2023.07.20.05.07.05 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 20 Jul 2023 05:07:05 -0700 (PDT) Message-ID: <6c3422e8-4e2e-ba3a-4f30-d24308ef7c2a@baylibre.com> Date: Thu, 20 Jul 2023 14:07:04 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.13.0 Subject: Re: [PATCH v3,3/3] drm/mediatek: dp: Add the audio divider to mtk_dp_data struct Content-Language: en-US To: AngeloGioacchino Del Regno , Shuijing Li , chunkuang.hu@kernel.org, p.zabel@pengutronix.de, airlied@gmail.com, daniel@ffwll.ch, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, matthias.bgg@gmail.com, jitao.shi@mediatek.com Cc: dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Project_Global_Chrome_Upstream_Group@mediatek.com References: <20230720082604.18618-1-shuijing.li@mediatek.com> <20230720082604.18618-4-shuijing.li@mediatek.com> <44cc9cc5-7dce-f7a2-f077-b62d7851ee12@baylibre.com> <65da6005-3c07-a7ea-6b63-db45c8915ae8@collabora.com> From: Alexandre Mergnat In-Reply-To: <65da6005-3c07-a7ea-6b63-db45c8915ae8@collabora.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 20/07/2023 13:54, AngeloGioacchino Del Regno wrote: > Il 20/07/23 12:14, Alexandre Mergnat ha scritto: >> >> >> On 20/07/2023 10:26, Shuijing Li wrote: >>> Due to the difference of HW, different dividers need to be set. >>> >>> Signed-off-by: Shuijing Li >>> Signed-off-by: Jitao Shi >>> --- >>> Changes in v3: >>> Separate these two things into two different patches. >>> per suggestion from the previous thread: >>> https://lore.kernel.org/lkml/e2ad22bcba31797f38a12a488d4246a01bf0cb2e.camel@mediatek.com/ >>> Changes in v2: >>> - change the variables' name to be more descriptive >>> - add a comment that describes the function of >>> mtk_dp_audio_sample_arrange >>> - reduce indentation by doing the inverse check >>> - add a definition of some bits >>> - add support for mediatek, mt8188-edp-tx >>> per suggestion from the previous thread: >>> https://lore.kernel.org/lkml/ac0fcec9-a2fe-06cc-c727-189ef7babe9c@collabora.com/ >>> --- >>>   drivers/gpu/drm/mediatek/mtk_dp.c     | 7 ++++++- >>>   drivers/gpu/drm/mediatek/mtk_dp_reg.h | 1 + >>>   2 files changed, 7 insertions(+), 1 deletion(-) >>> ... >>> b/drivers/gpu/drm/mediatek/mtk_dp_reg.h >>> index f38d6ff12afe..6d7f0405867e 100644 >>> --- a/drivers/gpu/drm/mediatek/mtk_dp_reg.h >>> +++ b/drivers/gpu/drm/mediatek/mtk_dp_reg.h >>> @@ -162,6 +162,7 @@ >>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MUL_2    (1 << 8) >>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MUL_4    (2 << 8) >>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MUL_8    (3 << 8) >>> +#define MT8188_AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2    (4 << 8) >> >> IMO, it's a bit weird to have SoC specific define in the generic header. >> Are you sure this bit is only available for MT8188 ? >> > > Eh, the P0_DIV2 bit is 5<<8 for MT8195, while for 8188 it's 4<<8, > clearly :-) > Ok then, to avoid this kind of issue for other SoCs in the future, is that make sense for you to do a SoC specific header file beside the generic one? >>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2    (5 << 8) >>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_4    (6 << 8) >>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_8    (7 << 8) >> >> Reviewed-by: Alexandre Mergnat >> > > -- Regards, Alexandre