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Wed, 25 Mar 2026 14:24:50 -0700 (PDT) X-Received: by 2002:a17:90b:2645:b0:359:ff8a:ee44 with SMTP id 98e67ed59e1d1-35c0dc8ee2bmr4558400a91.2.1774473890521; Wed, 25 Mar 2026 14:24:50 -0700 (PDT) Received: from [192.168.1.7] ([106.222.235.17]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-35c1e150e47sm61548a91.1.2026.03.25.14.24.43 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 25 Mar 2026 14:24:49 -0700 (PDT) Message-ID: <6ca731e8-3876-4a9b-b54e-4d6609ae77a9@oss.qualcomm.com> Date: Thu, 26 Mar 2026 02:54:41 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 01/16] drm/msm/a8xx: Fix the ticks used in submit traces To: Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Rob Clark , Sean Paul , Konrad Dybcio , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Marijn Suijten , David Airlie , Simona Vetter , Antonino Maniscalco , Connor Abbott , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann References: <20260324-a8xx-gpu-batch2-v1-0-fc95b8d9c017@oss.qualcomm.com> <20260324-a8xx-gpu-batch2-v1-1-fc95b8d9c017@oss.qualcomm.com> From: Akhil P Oommen Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=NOPYOk6g c=1 sm=1 tr=0 ts=69c452a3 cx=c_pps a=UNFcQwm+pnOIJct1K4W+Mw==:117 a=yg4K9g8yQ9z8uKSC4i4MOg==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=EUspDBNiAAAA:8 a=XS4MtbDpHg606iH8EgQA:9 a=QEXdDO2ut3YA:10 a=uKXjsCUrEbL0IQVhDsJ9:22 X-Proofpoint-ORIG-GUID: AxdJfDbNNkk16vPbSNyW31WvPA1AGt1a X-Proofpoint-GUID: AxdJfDbNNkk16vPbSNyW31WvPA1AGt1a X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzI1MDE1NyBTYWx0ZWRfX0pXBr+3+upLm vBNdigWOv8j1LRpp65BDoIzp1E1zbuRBffc2by6NmfBt9991jRERlcaEeKgw8fYX40cZh6bCa+4 jfsGNdXo0YnmkHb+RwP5+KO0RFtMeFXdyCOhsfJWXqosep/p7tJTnDp2nwWFso3m2fukygOPYqv AKZl/LByYGgLXe5MhFUdFyuSUidPEwHvxhxa8A3BBRyruQbEYmNEIBZZzWgCxBnn8OF60Ozsiqw 4REdT3is7LB4YHnnoSyyk1gpfMMYFhIVjiFOcscRo4gzliYM2j9ndqRxczEr08PetDP2Ai9Iq1t J6Ya5pSI6xxz6oZsxvOyaonc6Cyg2BKFCJOmlU04zOPz0ZoiNCxApI9B2uYP9npN+q+sFTG5Nic FhvwShxkxcOVEeaQzJwRL9HKyUiMSzRTf8Z+s+OYnsWCGpo7ZQAHDZIHWu0gAznOHAyUr2fPOGA wnxXhn3JJ5lGRUZ5UMw== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-25_05,2026-03-24_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 spamscore=0 clxscore=1015 priorityscore=1501 lowpriorityscore=0 impostorscore=0 malwarescore=0 bulkscore=0 phishscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603250157 On 3/24/2026 3:18 PM, Konrad Dybcio wrote: > On 3/23/26 9:12 PM, Akhil P Oommen wrote: >> GMU_ALWAYS_ON_COUNTER_* registers got moved in A8x, but currently, A6x >> register offsets are used in the submit traces instead of A8x offsets. >> To fix this, refactor a bit and use adreno_gpu->funcs->get_timestamp() >> everywhere. >> >> While we are at it, update a8xx_gmu_get_timestamp() to use the GMU AO >> counter. >> >> Fixes: 288a93200892 ("drm/msm/adreno: Introduce A8x GPU Support") >> Signed-off-by: Akhil P Oommen >> --- > > [...] > >> -static int a6xx_gmu_get_timestamp(struct msm_gpu *gpu, uint64_t *value) >> +static u64 a6xx_gmu_get_timestamp(struct msm_gpu *gpu) >> { >> struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); >> struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); >> >> - *value = read_gmu_ao_counter(a6xx_gpu); >> - >> - return 0; >> + return read_gmu_ao_counter(a6xx_gpu); > > Can we instead make read_gmu_ao_counter() take a struct msm_gpu * and drop > this wrapper? Other callers also already have a ptr of that type > > [...] > >> -int a8xx_gmu_get_timestamp(struct msm_gpu *gpu, uint64_t *value) >> +static u64 read_gmu_ao_counter(struct a6xx_gpu *a6xx_gpu) > > Similarly here (also I know this is a static symbol, but keeping an > a8xx_ prefix would be nice > > [...] > >> case MSM_PARAM_TIMESTAMP: >> if (adreno_gpu->funcs->get_timestamp) { >> - int ret; >> - >> pm_runtime_get_sync(&gpu->pdev->dev); >> - ret = adreno_gpu->funcs->get_timestamp(gpu, value); >> + *value = (uint64_t) adreno_gpu->funcs->get_timestamp(gpu); > > "u64", I think checkpathch will also warn about whitespace after a typecast I didn't see any checkpatch error (with b4 prep --check), but we can just remove this unnecessary typecast here. Ack on all other suggestions. -Akhil. > > Konrad