From: Alexandre Ghiti <alex@ghiti.fr>
To: Cyril Bur <cyrilbur@tenstorrent.com>,
palmer@dabbelt.com, aou@eecs.berkeley.edu,
paul.walmsley@sifive.com, charlie@rivosinc.com,
jrtc27@jrtc27.com, ben.dooks@codethink.co.uk
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
jszhang@kernel.org
Subject: Re: [PATCH v6 3/5] riscv: uaccess: use input constraints for ptr of __put_user()
Date: Tue, 22 Apr 2025 14:10:39 +0200 [thread overview]
Message-ID: <6cefe9be-c103-4533-9f44-4666d3fba2f5@ghiti.fr> (raw)
In-Reply-To: <20250410070526.3160847-4-cyrilbur@tenstorrent.com>
On 10/04/2025 09:05, Cyril Bur wrote:
> From: Jisheng Zhang <jszhang@kernel.org>
>
> Putting ptr in the inputs as opposed to output may seem incorrect but
> this is done for a few reasons:
> - Not having it in the output permits the use of asm goto in a
> subsequent patch. There are bugs in gcc [1] which would otherwise
> prevent it.
> - Since the output memory is userspace there isn't any real benefit from
> telling the compiler about the memory clobber.
> - x86, arm and powerpc all use this technique.
>
> Link: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113921 # 1
>
> Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
> [Cyril Bur: Rewritten commit message]
> Signed-off-by: Cyril Bur <cyrilbur@tenstorrent.com>
> ---
> arch/riscv/include/asm/uaccess.h | 18 +++++++++---------
> 1 file changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/arch/riscv/include/asm/uaccess.h b/arch/riscv/include/asm/uaccess.h
> index c9a461467bf4..da36057847f0 100644
> --- a/arch/riscv/include/asm/uaccess.h
> +++ b/arch/riscv/include/asm/uaccess.h
> @@ -219,11 +219,11 @@ do { \
> __typeof__(*(ptr)) __x = x; \
> __asm__ __volatile__ ( \
> "1:\n" \
> - " " insn " %z2, %1\n" \
> + " " insn " %z1, %2\n" \
> "2:\n" \
> _ASM_EXTABLE_UACCESS_ERR(1b, 2b, %0) \
> - : "+r" (err), "=m" (*(ptr)) \
> - : "rJ" (__x)); \
> + : "+r" (err) \
> + : "rJ" (__x), "m"(*(ptr))); \
> } while (0)
>
> #ifdef CONFIG_64BIT
> @@ -236,16 +236,16 @@ do { \
> u64 __x = (__typeof__((x)-(x)))(x); \
> __asm__ __volatile__ ( \
> "1:\n" \
> - " sw %z3, %1\n" \
> + " sw %z1, %3\n" \
> "2:\n" \
> - " sw %z4, %2\n" \
> + " sw %z2, %4\n" \
> "3:\n" \
> _ASM_EXTABLE_UACCESS_ERR(1b, 3b, %0) \
> _ASM_EXTABLE_UACCESS_ERR(2b, 3b, %0) \
> - : "+r" (err), \
> - "=m" (__ptr[__LSW]), \
> - "=m" (__ptr[__MSW]) \
> - : "rJ" (__x), "rJ" (__x >> 32)); \
> + : "+r" (err) \
> + : "rJ" (__x), "rJ" (__x >> 32), \
> + "m" (__ptr[__LSW]), \
> + "m" (__ptr[__MSW])); \
> } while (0)
> #endif /* CONFIG_64BIT */
>
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Thanks,
Alex
next prev parent reply other threads:[~2025-04-22 12:10 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-10 7:05 [PATCH v6 0/5] riscv: uaccess: optimisations Cyril Bur
2025-04-10 7:05 ` [PATCH v6 1/5] riscv: save the SR_SUM status over switches Cyril Bur
2025-04-22 10:22 ` Alexandre Ghiti
2025-05-21 8:26 ` Ben Dooks
2025-05-21 13:38 ` Samuel Holland
2025-05-21 14:30 ` Alexandre Ghiti
2025-05-21 14:45 ` Cyril Bur
2025-05-22 16:15 ` [EXT] " Cyril Bur
2025-05-22 17:40 ` Andy Chiu
2025-05-22 20:03 ` Ben Dooks
2025-04-22 23:01 ` Deepak Gupta
2025-04-23 6:44 ` Alexandre Ghiti
2025-05-20 16:49 ` Deepak Gupta
2025-05-22 6:23 ` Ben Dooks
2025-05-22 14:49 ` Deepak Gupta
2025-05-22 17:42 ` Andy Chiu
2025-05-22 22:43 ` Deepak Gupta
2025-05-23 12:22 ` Alexandre Ghiti
2025-05-23 17:14 ` Deepak Gupta
2025-05-23 20:00 ` Alexandre Ghiti
2025-05-27 19:34 ` Deepak Gupta
2025-05-24 10:00 ` Andy Chiu
2025-05-27 20:58 ` Deepak Gupta
2025-04-10 7:05 ` [PATCH v6 2/5] riscv: implement user_access_begin() and families Cyril Bur
2025-04-22 10:26 ` Alexandre Ghiti
2025-04-10 7:05 ` [PATCH v6 3/5] riscv: uaccess: use input constraints for ptr of __put_user() Cyril Bur
2025-04-22 12:10 ` Alexandre Ghiti [this message]
2025-04-10 7:05 ` [PATCH v6 4/5] riscv: uaccess: use 'asm goto' for put_user() Cyril Bur
2025-04-22 10:36 ` Alexandre Ghiti
2025-04-10 7:05 ` [PATCH v6 5/5] riscv: uaccess: use 'asm_goto_output' for get_user() Cyril Bur
2025-04-22 12:19 ` Alexandre Ghiti
2025-05-09 17:30 ` [PATCH v6 0/5] riscv: uaccess: optimisations patchwork-bot+linux-riscv
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