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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-DetectorID-Processed: b00c1d49-9d2e-4205-b15f-d015386d3d5e On 10/26/26 11:28, Florian Fainelli wrote: > The NSP probe path assumes firmware has enabled the SATA IDM interface > clock and released the core reset. The downstream iProc config_AHCI() > sequence explicitly performs both operations before accessing AHCI. > Without that setup, a cold boot can access an inactive controller. > > Map the optional NSP IDM register region and enable the interface clock > before releasing reset, retaining the downstream settling intervals. > Perform the sequence at probe and resume before reconfiguring SATA. > > Keep the resource optional so older device trees continue to rely on > firmware initialization. > > Fixes: 3ee2e6dcaa35 ("ata: ahci_brcm: Add support for Broadcom NSP SoC") > Signed-off-by: Florian Fainelli Apologies, this is the same as v1, I will resubmit in a short while. -- Florian