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([2a06:c701:77bf:9b01::1]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-428e11c8eb9sm65806265e9.16.2024.08.02.08.33.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Aug 2024 08:33:22 -0700 (PDT) Message-ID: <6d043ba2be415fae75d0789d1b7b4d432032a113.camel@redhat.com> Subject: Re: [PATCH v3 0/2] Fix for a very old KVM bug in the segment cache From: mlevitsk@redhat.com To: kvm@vger.kernel.org Cc: Sean Christopherson , Dave Hansen , Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , linux-kernel@vger.kernel.org, Paolo Bonzini , x86@kernel.org Date: Fri, 02 Aug 2024 18:33:20 +0300 In-Reply-To: <20240725175232.337266-1-mlevitsk@redhat.com> References: <20240725175232.337266-1-mlevitsk@redhat.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.44.4 (3.44.4-3.fc36) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 =D0=A3 =D1=87=D1=82, 2024-07-25 =D1=83 13:52 -0400, Maxim Levitsky =D0=BF= =D0=B8=D1=88=D0=B5: > Hi, >=20 > Recently, while trying to understand why the pmu_counters_test > selftest sometimes fails when run nested I stumbled > upon a very interesting and old bug: >=20 > It turns out that KVM caches guest segment state, > but this cache doesn't have any protection against concurrent use. >=20 > This usually works because the cache is per vcpu, and should > only be accessed by vCPU thread, however there is an exception: >=20 > If the full preemption is enabled in the host kernel, > it is possible that vCPU thread will be preempted, for > example during the vmx_vcpu_reset. >=20 > vmx_vcpu_reset resets the segment cache bitmask and then initializes > the segments in the vmcs, however if the vcpus is preempted in the > middle of this code, the kvm_arch_vcpu_put is called which > reads SS's AR bytes to determine if the vCPU is in the kernel mode, > which caches the old value. >=20 > Later vmx_vcpu_reset will set the SS's AR field to the correct value > in vmcs but the cache still contains an invalid value which > can later for example leak via KVM_GET_SREGS and such. >=20 > In particular, kvm selftests will do KVM_GET_SREGS, > and then KVM_SET_SREGS, with a broken SS's AR field passed as is, > which will lead to vm entry failure. >=20 > This issue is not a nested issue, and actually I was able > to reproduce it on bare metal, but due to timing it happens > much more often nested. The only requirement for this to happen > is to have full preemption enabled in the kernel which runs the selftest. >=20 > pmu_counters_test reproduces this issue well, because it creates > lots of short lived VMs, but the issue as was noted > about is not related to pmu. >=20 > To paritally fix this issue, call vmx_segment_cache_clear > after we done with segment register setup in vmx_vcpu_reset. >=20 > V2: incorporated Paolo's suggestion of having > =C2=A0=C2=A0=C2=A0 vmx_write_segment_cache_start/end functions=C2=A0 (tha= nks!) >=20 > V3: reverted to a partial fix. >=20 > Best regards, > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0Maxim Levitsky >=20 > Maxim Levitsky (2): > =C2=A0 KVM: nVMX: use vmx_segment_cache_clear > =C2=A0 VMX: reset the segment cache after segment initialization in > =C2=A0=C2=A0=C2=A0 vmx_vcpu_reset >=20 > =C2=A0arch/x86/kvm/vmx/nested.c |=C2=A0 3 ++- > =C2=A0arch/x86/kvm/vmx/vmx.c=C2=A0=C2=A0=C2=A0 | 10 +++------- > =C2=A0arch/x86/kvm/vmx/vmx.h=C2=A0=C2=A0=C2=A0 |=C2=A0 5 +++++ > =C2=A03 files changed, 10 insertions(+), 8 deletions(-) >=20 > --=20 > 2.26.3 >=20 >=20 Any update? Best regards, Maxim Levitsky