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From: Keir Fraser <Keir.Fraser@cl.cam.ac.uk>
To: Nick Piggin <nickpiggin@yahoo.com.au>
Cc: Zachary Amsden <zach@vmware.com>,
	Pratap Subrahmanyam <pratap@vmware.com>,
	Hugh Dickins <hugh@veritas.com>,
	Linux-Kernel <linux-kernel@vger.kernel.org>,
	Andrew Morton <akpm@osdl.com>, Jan Beulich <jbeulich@novell.com>
Subject: Re: [PATCH 2/2] I386 convert pae wmb to non smp
Date: Thu, 27 Apr 2006 09:21:54 +0100	[thread overview]
Message-ID: <6da99325005e79f72b7c45a0228dea39@cl.cam.ac.uk> (raw)
In-Reply-To: <44503AD5.9020605@yahoo.com.au>


On 27 Apr 2006, at 04:30, Nick Piggin wrote:

>> The name is pretty confused.  smp_wmb seems to imply an SMP-only 
>> barrier, whereas we want here a write barrier on regular memory.
>
> That is just a compiler barrier (barrier()). A CPU should always be 
> consistent with
> itself so memory ordering doesn't really apply there (hence smp_ 
> prefix, which also
> are compiler barriers, of course).

This would be an issue of consistency between a CPU and its TLB, so I 
doubt the usual self-consistency argument would hold. I would consider 
the TLB as logically external and separate from the core execution 
logic of the CPU. Of course it's an academic point either way since no 
PAE-capable x86 processor ever reorders stores to WB memory -- my 
original point was simply that smp_wmb() is a misleading name in this 
context, even barrier() would be clearer imo, but I'm in no way a Linux 
abstract memory model expert.

  -- Keir


      reply	other threads:[~2006-04-27  8:22 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2006-04-26 22:03 Zachary Amsden
2006-04-27  0:00 ` Nick Piggin
2006-04-27  1:09   ` Zachary Amsden
2006-04-27  3:30     ` Nick Piggin
2006-04-27  8:21       ` Keir Fraser [this message]

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