From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: ARC-Seal: i=1; a=rsa-sha256; t=1525800090; cv=none; d=google.com; s=arc-20160816; b=l4KVFd59YQlH90NK6BWjY+ZJxbfgIDzGTVrbYbf/Y8lzGBqgNW2x4UvRfQGfq/0Wbh QmkXTHNksK7zQEDVee8/rABwWR3n/gN/1bL4nQjDuwDH2O4QvChM+M+Yhx01SCzTcxkr BCzTVVU+CJ7nwwj+eOcH3yHhzgq0hpnxnkKTmNxGT/B1Dmapo9CIGGl0tCMtheKG8Oqu H0gyWi/kMVY8dxSsvtUxp8NcYj6EtXV5WSl/F/EL8EsQ7m9anLYbA9RTsktULwwX9Cmz f+wpz3U7pqS1vboNekrO9yV69ihBti05a7G2jkCqz5aNV+fr3dUMp0NP/sGAbbJDugwU tS8g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=jbkhXrRvTlyGtIhCUyaj6swglIMiFavfzggX8v1LmeQ=; b=VFm1cfcF+lpHkCkzegyEshbpdbsRWVGwunV6PAOhsKLymcxvwIH4zJx4VTDxN/OaWr UuW7ldvDRsUq+PH14fnvug7yMfMTPzW1NpIf3ui59EcTTA/s0uGL+0IGTpp197v5d5ff q7EnhTVFHsfQ10Rzk4o9Y9PkzYV1ciyfggZXK/aqHoc91WP8IttBzDVb0dsjJV2r6goE mfokzh8fmzpmCbfO4ycjRk0AYEC8NUXPlq3yA+e0k75GbHVYtqPoaTZWgN0crhpo71m+ OVVOxLGnQsOCzOxcWBTrRfDaXRZ2htB4sNGEhUlqK8ZLmg4BP/RlLx8dQTg6Popk/WsU L2Ag== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20161025 header.b=CvgfYjjR; spf=pass (google.com: domain of andreyknvl@google.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=andreyknvl@google.com; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20161025 header.b=CvgfYjjR; spf=pass (google.com: domain of andreyknvl@google.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=andreyknvl@google.com; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com X-Google-Smtp-Source: AB8JxZpYsqKAiJ2z9Ce+h5NOhiZ7W+/cd/jBI8i+zQ6XuExLEkhgnU1s4LhUvW/4vLqG2FuVqGuTwg== From: Andrey Konovalov To: Andrey Ryabinin , Alexander Potapenko , Dmitry Vyukov , Jonathan Corbet , Catalin Marinas , Will Deacon , Christopher Li , Christoph Lameter , Pekka Enberg , David Rientjes , Joonsoo Kim , Andrew Morton , Masahiro Yamada , Michal Marek , Andrey Konovalov , Mark Rutland , Nick Desaulniers , Yury Norov , Marc Zyngier , Kristina Martsenko , Suzuki K Poulose , Punit Agrawal , Dave Martin , Ard Biesheuvel , James Morse , Michael Weiser , Julien Thierry , Tyler Baicar , "Eric W . Biederman" , Thomas Gleixner , Ingo Molnar , Kees Cook , Sandipan Das , David Woodhouse , Paul Lawrence , Herbert Xu , Josh Poimboeuf , Geert Uytterhoeven , Tom Lendacky , Arnd Bergmann , Dan Williams , Michal Hocko , Jan Kara , Ross Zwisler , =?UTF-8?q?J=C3=A9r=C3=B4me=20Glisse?= , Matthew Wilcox , "Kirill A . Shutemov" , Souptick Joarder , Hugh Dickins , Davidlohr Bueso , Greg Kroah-Hartman , Philippe Ombredanne , Kate Stewart , Laura Abbott , Boris Brezillon , Vlastimil Babka , Pintu Agarwal , Doug Berger , Anshuman Khandual , Mike Rapoport , Mel Gorman , Pavel Tatashin , Tetsuo Handa , kasan-dev@googlegroups.com, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sparse@vger.kernel.org, linux-mm@kvack.org, linux-kbuild@vger.kernel.org Cc: Kostya Serebryany , Evgeniy Stepanov , Lee Smith , Ramana Radhakrishnan , Jacob Bramley , Ruben Ayrapetyan , Kees Cook , Jann Horn , Mark Brand , Chintan Pandya Subject: [PATCH v1 09/16] khwasan, arm64: enable top byte ignore for the kernel Date: Tue, 8 May 2018 19:20:55 +0200 Message-Id: <6dc5e2922cc3d44792d9277be843558892b1b671.1525798754.git.andreyknvl@google.com> X-Mailer: git-send-email 2.17.0.441.gb46fe60e1d-goog In-Reply-To: References: In-Reply-To: References: X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: =?utf-8?q?1599917355217652219?= X-GMAIL-MSGID: =?utf-8?q?1599917355217652219?= X-Mailing-List: linux-kernel@vger.kernel.org List-ID: KHWASAN uses the Top Byte Ignore feature of arm64 CPUs to store a pointer tag in the top byte of each pointer. This commit enables the TCR_TBI1 bit, which enables Top Byte Ignore for the kernel, when KHWASAN is used. Signed-off-by: Andrey Konovalov --- arch/arm64/include/asm/pgtable-hwdef.h | 1 + arch/arm64/mm/proc.S | 8 +++++++- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h index fd208eac9f2a..483aceedad76 100644 --- a/arch/arm64/include/asm/pgtable-hwdef.h +++ b/arch/arm64/include/asm/pgtable-hwdef.h @@ -289,6 +289,7 @@ #define TCR_A1 (UL(1) << 22) #define TCR_ASID16 (UL(1) << 36) #define TCR_TBI0 (UL(1) << 37) +#define TCR_TBI1 (UL(1) << 38) #define TCR_HA (UL(1) << 39) #define TCR_HD (UL(1) << 40) #define TCR_NFD1 (UL(1) << 54) diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S index 5f9a73a4452c..f3dfcd74a285 100644 --- a/arch/arm64/mm/proc.S +++ b/arch/arm64/mm/proc.S @@ -47,6 +47,12 @@ /* PTWs cacheable, inner/outer WBWA */ #define TCR_CACHE_FLAGS TCR_IRGN_WBWA | TCR_ORGN_WBWA +#ifdef CONFIG_KASAN_HW +#define TCR_KASAN_FLAGS TCR_TBI1 +#else +#define TCR_KASAN_FLAGS 0 +#endif + #define MAIR(attr, mt) ((attr) << ((mt) * 8)) /* @@ -439,7 +445,7 @@ ENTRY(__cpu_setup) */ ldr x10, =TCR_TxSZ(VA_BITS) | TCR_CACHE_FLAGS | TCR_SMP_FLAGS | \ TCR_TG_FLAGS | TCR_KASLR_FLAGS | TCR_ASID16 | \ - TCR_TBI0 | TCR_A1 + TCR_TBI0 | TCR_A1 | TCR_KASAN_FLAGS tcr_set_idmap_t0sz x10, x9 /* -- 2.17.0.441.gb46fe60e1d-goog