Re: [PATCH v7 15/20] perf: arm_pmuv3: Handle IRQs for Partitioned PMU guest counters

[wuyifan <wuyifan50@huawei.com>]

Hi Colton,

On 5/5/2026 5:18 AM, Colton Lewis wrote:
>   static irqreturn_t armv8pmu_handle_irq(struct arm_pmu *cpu_pmu)
>   {
> -	u64 pmovsr;
>   	struct perf_sample_data data;
>   	struct pmu_hw_events *cpuc = this_cpu_ptr(cpu_pmu->hw_events);
>   	struct pt_regs *regs;
> +	u64 host_set = kvm_pmu_host_counter_mask(cpu_pmu);
> +	u64 pmovsr;
kvm_pmu_host_counter_mask() is called from armv8pmu_handle_irq(). This
interrupt fires in both host and guest contexts.

However, kvm_pmu_host_counter_mask() dereferences
host_data_ptr(nr_event_counters). This indirection requires
kvm_arm_hyp_percpu_base[cpu] to be initialized, which only happens during
KVM hypervisor setup. When the interrupt fires in a guest kernel where 
KVM is
compiled but not active, the per-CPU base is NULL and the dereference 
faults.

Thanks,
Yifan