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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5d097eb9bdesm1054157a12.82.2024.11.28.12.51.36 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 28 Nov 2024 12:51:39 -0800 (PST) Message-ID: <6deb55c7-78de-462a-bd15-6b1cdd4c731d@oss.qualcomm.com> Date: Thu, 28 Nov 2024 21:51:35 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 1/2] arm64: dts: qcom: qcs615: add SDHC1 and SDHC2 To: Krzysztof Kozlowski , Dmitry Baryshkov , Konrad Dybcio Cc: Yuanjie Yang , ulf.hansson@linaro.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, bhupesh.sharma@linaro.org, andersson@kernel.org, konradybcio@kernel.org, linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, quic_tingweiz@quicinc.com References: <20241122065101.1918470-1-quic_yuanjiey@quicinc.com> <20241122065101.1918470-2-quic_yuanjiey@quicinc.com> <7c0c1120-c2b2-40dd-8032-339cc4d4cda4@oss.qualcomm.com> <03b6f863-ccdd-4e07-9574-ee9dd7c20ab5@kernel.org> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <03b6f863-ccdd-4e07-9574-ee9dd7c20ab5@kernel.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: ljHbtVw8S4EFBdDKfPU4-ji58OuFQ6IP X-Proofpoint-GUID: ljHbtVw8S4EFBdDKfPU4-ji58OuFQ6IP X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 phishscore=0 priorityscore=1501 bulkscore=0 malwarescore=0 adultscore=0 suspectscore=0 mlxlogscore=999 spamscore=0 mlxscore=0 lowpriorityscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2411280166 On 26.11.2024 10:26 AM, Krzysztof Kozlowski wrote: > On 26/11/2024 01:07, Dmitry Baryshkov wrote: >>>> >>>> diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi >>>> index 590beb37f441..37c6ab217c96 100644 >>>> --- a/arch/arm64/boot/dts/qcom/qcs615.dtsi >>>> +++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi >>>> @@ -399,6 +399,65 @@ qfprom: efuse@780000 { >>>> #size-cells = <1>; >>>> }; >>>> >>>> + sdhc_1: mmc@7c4000 { >>>> + compatible = "qcom,qcs615-sdhci", "qcom,sdhci-msm-v5"; >>>> + reg = <0x0 0x007c4000 0x0 0x1000>, >>>> + <0x0 0x007c5000 0x0 0x1000>; >>>> + reg-names = "hc", >>>> + "cqhci"; >>> >>> There's an "ice" region at 0x007c8000 >> >> Shouldn't ice now be handled by a separate device? > It should and UFS bindings expect that. However I am not sure if MMC was > improved to support external ICE device. Also for example on SM8550 the > ICE has entirely different (further) address space, so it also suggests > it is separate device. Here address space looks almost continuous. Some SoCs have two ICEs (one for UFS and one for SDHCI) - seems to be mainly the case on platforms where there's "sdhc1" (intended for eMMC) *and* a UFS host. The commit message that introduced a separate driver says: """ The reason for this is because, staring with SM8550, the ICE IP block is shared between UFS and SDCC, which means we need to probe a dedicated device and share it between those two consumers. """ but: * in sm8550.dtsi, only UFS has a qcom,ice reference (like other device trees using that binding) * I can't find anything that would back this internally I'm not sure how this is supposed to work, especially on SoCs with two instances Konrad