From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752783AbcCaEQy (ORCPT ); Thu, 31 Mar 2016 00:16:54 -0400 Received: from mail-yw0-f194.google.com ([209.85.161.194]:34920 "EHLO mail-yw0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752224AbcCaEOb (ORCPT ); Thu, 31 Mar 2016 00:14:31 -0400 From: Len Brown To: x86@kernel.org Cc: linux-kernel@vger.kernel.org, Len Brown Subject: [PATCH 1/9] x86 tsc_msr: Identify Intel-specific code Date: Thu, 31 Mar 2016 00:13:47 -0400 Message-Id: <6e0c25e64e0fb65a42dfc63ad5f660302e07cd87.1459397558.git.len.brown@intel.com> X-Mailer: git-send-email 2.8.0.rc4.16.g56331f8 In-Reply-To: <1459397635-4871-1-git-send-email-lenb@kernel.org> References: <1459397635-4871-1-git-send-email-lenb@kernel.org> Reply-To: Len Brown Organization: Intel Open Source Technology Center Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Len Brown try_msr_calibrate_tsc() is currently Intel-specific, and should not execute on any other vendor's parts. Signed-off-by: Len Brown --- arch/x86/kernel/tsc_msr.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/x86/kernel/tsc_msr.c b/arch/x86/kernel/tsc_msr.c index 92ae6ac..c16e35b 100644 --- a/arch/x86/kernel/tsc_msr.c +++ b/arch/x86/kernel/tsc_msr.c @@ -86,6 +86,9 @@ unsigned long try_msr_calibrate_tsc(void) unsigned long res; int cpu_index; + if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) + return 0; + cpu_index = match_cpu(boot_cpu_data.x86, boot_cpu_data.x86_model); if (cpu_index < 0) return 0; -- 2.8.0.rc4.16.g56331f8