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Fri, 1 Dec 2023 00:50:39 GMT Received: from [10.71.109.77] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Thu, 30 Nov 2023 16:50:39 -0800 Message-ID: <6ed0c636-c222-36b3-aae9-eb822e088a2c@quicinc.com> Date: Thu, 30 Nov 2023 16:50:38 -0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [PATCH 14/16] drm/msm/dpu: do not allow YUV formats if no CDM block is present Content-Language: en-US To: Dmitry Baryshkov CC: , Rob Clark , "Sean Paul" , Marijn Suijten , "David Airlie" , Daniel Vetter , , , , , , References: <20230830224910.8091-1-quic_abhinavk@quicinc.com> <20230830224910.8091-15-quic_abhinavk@quicinc.com> From: Abhinav Kumar In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: GP_k8ApHg65NP_08TXp-Cw7iD8AlHq5I X-Proofpoint-GUID: GP_k8ApHg65NP_08TXp-Cw7iD8AlHq5I X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-30_25,2023-11-30_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 priorityscore=1501 impostorscore=0 phishscore=0 spamscore=0 malwarescore=0 bulkscore=0 adultscore=0 clxscore=1015 mlxscore=0 mlxlogscore=749 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311060000 definitions=main-2312010004 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 8/30/2023 5:24 PM, Dmitry Baryshkov wrote: > On Thu, 31 Aug 2023 at 01:50, Abhinav Kumar wrote: >> >> On chipsets where CDM block is not available OR where support has >> not been added yet do not allow YUV formats for writeback block. >> >> Signed-off-by: Abhinav Kumar >> --- >> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c | 6 ++++++ >> 1 file changed, 6 insertions(+) >> >> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c >> index 7fc174b33ae2..d8edca9bc964 100644 >> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c >> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c >> @@ -406,6 +406,12 @@ static int dpu_encoder_phys_wb_atomic_check( >> return ret; >> } >> >> + if (DPU_FORMAT_IS_YUV(to_dpu_format(msm_framebuffer_format(fb))) && >> + !phys_enc->dpu_kms->catalog->cdm) { >> + DPU_ERROR("cannot support YUV formats without CDM block\n"); >> + return -EINVAL; >> + } > > Can we have YUV formats in wb_formats if we do not support CDM? That > would be an error. I can drop this one once i address the comments on the next patch. Yeah the reason for this change was we had one formats array for wb and were using that for all chipsets. We can have two arrays : one only rgb and the other rgb+yuv to address this. > >> + >> return 0; >> } >> >> -- >> 2.40.1 >> > >