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[78.210.255.2]) by smtp.googlemail.com with ESMTPSA id v11sm8441552wrq.80.2019.05.17.08.42.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 17 May 2019 08:42:20 -0700 (PDT) Subject: Re: [PATCHv1 5/8] arm64: dts: qcom: qcs404: Add PSCI cpuidle low power states To: Amit Kucheria , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, andy.gross@linaro.org, David Brown , Li Yang , Shawn Guo Cc: Niklas Cassel , devicetree@vger.kernel.org References: From: Daniel Lezcano Message-ID: <6efa62cb-2f9b-f462-95fc-b9bcddac76b2@linaro.org> Date: Fri, 17 May 2019 17:42:19 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.6.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 10/05/2019 13:29, Amit Kucheria wrote: > From: Niklas Cassel > > Add device bindings for cpuidle states for cpu devices. > > [amit: rename the idle-states to more generic names and fixups] > > Signed-off-by: Niklas Cassel > Reviewed-by: Vinod Koul > Signed-off-by: Amit Kucheria Acked-by: Daniel Lezcano > --- > arch/arm64/boot/dts/qcom/qcs404.dtsi | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi > index e8fd26633d57..369c59c35bc7 100644 > --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi > +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi > @@ -30,6 +30,7 @@ > compatible = "arm,cortex-a53"; > reg = <0x100>; > enable-method = "psci"; > + cpu-idle-states = <&CPU_SLEEP_0>; > next-level-cache = <&L2_0>; > }; > > @@ -38,6 +39,7 @@ > compatible = "arm,cortex-a53"; > reg = <0x101>; > enable-method = "psci"; > + cpu-idle-states = <&CPU_SLEEP_0>; > next-level-cache = <&L2_0>; > }; > > @@ -46,6 +48,7 @@ > compatible = "arm,cortex-a53"; > reg = <0x102>; > enable-method = "psci"; > + cpu-idle-states = <&CPU_SLEEP_0>; > next-level-cache = <&L2_0>; > }; > > @@ -54,6 +57,7 @@ > compatible = "arm,cortex-a53"; > reg = <0x103>; > enable-method = "psci"; > + cpu-idle-states = <&CPU_SLEEP_0>; > next-level-cache = <&L2_0>; > }; > > @@ -61,6 +65,20 @@ > compatible = "cache"; > cache-level = <2>; > }; > + > + idle-states { > + entry-method="psci"; > + > + CPU_SLEEP_0: cpu-sleep-0 { > + compatible = "arm,idle-state"; > + idle-state-name = "standalone-power-collapse"; > + arm,psci-suspend-param = <0x40000003>; > + entry-latency-us = <125>; > + exit-latency-us = <180>; > + min-residency-us = <595>; > + local-timer-stop; > + }; > + }; > }; > > firmware { > -- Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog