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Wed, 12 Jun 2024 00:04:53 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA03.qualcomm.com (8.17.1.19/8.17.1.19) with ESMTPS id 45C04qM3016093 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 12 Jun 2024 00:04:52 GMT Received: from [10.71.108.229] (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 11 Jun 2024 17:04:52 -0700 Message-ID: <6f51224a-a7cd-4774-827a-967a4f4b38ee@quicinc.com> Date: Tue, 11 Jun 2024 17:04:51 -0700 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 04/14] drm/msm/hdmi: set infoframes on all pre_enable calls Content-Language: en-US To: Dmitry Baryshkov , Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , "David Airlie" , Daniel Vetter CC: , , , References: <20240522-fd-hdmi-hpd-v2-0-c30bdb7c5c7e@linaro.org> <20240522-fd-hdmi-hpd-v2-4-c30bdb7c5c7e@linaro.org> From: Jessica Zhang In-Reply-To: <20240522-fd-hdmi-hpd-v2-4-c30bdb7c5c7e@linaro.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: Cp7JDNilM0owFr5HiQ_J0I9CQx2em4ES X-Proofpoint-ORIG-GUID: Cp7JDNilM0owFr5HiQ_J0I9CQx2em4ES X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-11_12,2024-06-11_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 lowpriorityscore=0 clxscore=1015 malwarescore=0 mlxlogscore=999 spamscore=0 suspectscore=0 adultscore=0 bulkscore=0 mlxscore=0 phishscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2405170001 definitions=main-2406110164 On 5/22/2024 3:50 AM, Dmitry Baryshkov wrote: > In consequent modeset calls, the atomic_pre_enable() will be called > several times without calling atomic_post_disable() inbetween. Thus Hi Dmitry, Just wondering, where are you seeing multiple pre_enable() calls without a post_disable() happening? IIRC, the msm commit_tail always calls commit_modeset_disables() before the commit_modeset_enables(). Also, doesn't the pre_enable() and post_disable() only happen once for bringing up/down the bridge? Thanks, Jessica Zhang > iframes will not be updated for the next mode. Fix this by setting the > iframe outside of the !power_on check. > > Signed-off-by: Dmitry Baryshkov > --- > drivers/gpu/drm/msm/hdmi/hdmi_bridge.c | 9 +++++---- > 1 file changed, 5 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/msm/hdmi/hdmi_bridge.c b/drivers/gpu/drm/msm/hdmi/hdmi_bridge.c > index 3c6121c57b01..fb99328107dd 100644 > --- a/drivers/gpu/drm/msm/hdmi/hdmi_bridge.c > +++ b/drivers/gpu/drm/msm/hdmi/hdmi_bridge.c > @@ -133,10 +133,11 @@ static void msm_hdmi_bridge_atomic_pre_enable(struct drm_bridge *bridge, > msm_hdmi_phy_resource_enable(phy); > msm_hdmi_power_on(bridge); > hdmi->power_on = true; > - if (hdmi->hdmi_mode) { > - msm_hdmi_config_avi_infoframe(hdmi); > - msm_hdmi_audio_update(hdmi); > - } > + } > + > + if (hdmi->hdmi_mode) { > + msm_hdmi_config_avi_infoframe(hdmi); > + msm_hdmi_audio_update(hdmi); > } > > msm_hdmi_phy_powerup(phy, hdmi->pixclock); > > -- > 2.39.2 >