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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id jz18-20020a17090775f200b0070fd7da3e47sm8859460ejc.127.2022.06.30.03.07.03 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 30 Jun 2022 03:07:03 -0700 (PDT) Message-ID: <6fafbed8-9c6d-ae1b-c613-44982b681276@linaro.org> Date: Thu, 30 Jun 2022 12:07:02 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.10.0 Subject: Re: [PATCH 1/4] dt-bindings: misc: tmr-manager: Add device-tree binding for TMR Manager Content-Language: en-US To: "Rao, Appana Durga Kedareswara" , "Simek, Michal" , Appana Durga Kedareswara rao , "robh+dt@kernel.org" , "krzysztof.kozlowski+dt@linaro.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "michal.simek@xilinx.com" , "derek.kiernan@xilinx.com" , "dragan.cvetic@xilinx.com" , "arnd@arndb.de" , "gregkh@linuxfoundation.org" , "linux-arm-kernel@lists.infradead.org" Cc: "git (AMD-Xilinx)" , "git@xilinx.com" References: <20220628054338.1631516-1-appana.durga.rao@xilinx.com> <20220628054338.1631516-2-appana.durga.rao@xilinx.com> <6f5a1b1e-b484-3a15-00be-2c1ddc09468e@amd.com> From: Krzysztof Kozlowski In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 29/06/2022 14:37, Rao, Appana Durga Kedareswara wrote: > Hi, > > > On 29/06/22 5:29 pm, Michal Simek wrote: >> >> >> On 6/29/22 13:45, Krzysztof Kozlowski wrote: >>> On 29/06/2022 13:23, Michal Simek wrote: >>>> >>>> >>>> On 6/29/22 12:07, Krzysztof Kozlowski wrote: >>>>> On 28/06/2022 07:43, Appana Durga Kedareswara rao wrote: >>>>>> This commit adds documentation for Triple Modular Redundancy(TMR) >>>>>> Manager >>>>>> IP. The Triple Modular Redundancy(TMR) Manager is responsible for >>>>>> handling >>>>>> the TMR subsystem state, including fault detection and error recovery >>>>>> provides soft error detection, correction and recovery features. >>>>>> >>>>>> Signed-off-by: Appana Durga Kedareswara rao >>>>>> >>>>>> --- >>>>>> .../bindings/misc/xlnx,tmr-manager.yaml | 48 >>>>>> +++++++++++++++++++ >>>>> >>>>> This is not a misc device. Find appropriate subsystem for it. It's not >>>>> EDAC, right? >>>> >>>> We were thinking where to put it but it is not EDAC driver. >>>> If you have better suggestion for subsystem please let us know. >>> >>> I don't know what's the device about. The description does not help: >>> >>> "TMR Manager is responsible for TMR subsystem state..." >> >> ok. let's improve commit message in v2. > > Sure will improve the commit message in v2. >> >> TMR - triple module redundancy. >> >> You design the system with one CPU which is default microblaze >> configuration with interrupt controller, timer and other IPs. >> >> And then say I want to do it triple redundant with all that voting, etc. >> If you want to get all details you can take a look at this guide >> >> https://www.xilinx.com/content/dam/xilinx/support/documents/ip_documentation/tmr/v1_0/pg268-tmr.pdf >> >> >> In short TMR manager is servicing all that 3 cores and making sure that >> they are all running in sync. If not it has capability recover the >> system. It means cpu gets to break handler (it is the part of microblaze >> series) and it restarts all cpus. >> >> And TMR inject driver is module which is capable to inject error to >> internal memory to cause the exception to exercise that recovery code. >> >> Kedar: Feel free to correct me or add more details. > > Thanks Michal for the detailed explanation. > > The Triple Modular Redundancy(TMR) subsystem has three Microblaze > processor instances, If any one of the Microblaze processors goes to an > unknown state due to fault injection break handler will get called, > which in turn calls the tmr manager driver API to perform recovery. > like Michal said TMR inject driver is capable of inject error to > internal memory to cause fault in one the Microblaze processor > > @Krzysztof : please let me know if more information required about > this TMR subsystem will provide. Some features sound like watchdog. If it was ARM, I would suggest to put it under "soc". Is a term System-on-Chip applicable to Microblaze? Other option is to store it under microblaze (although for ARM and RISC-V this is actually discouraged in favor of soc). Best regards, Krzysztof