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From: Suzuki K Poulose <Suzuki.Poulose@arm.com>
To: Jan Glauber <jglauber@cavium.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Will Deacon <will.deacon@arm.com>
Cc: linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, Borislav Petkov <bp@alien8.de>,
	David Daney <david.daney@cavium.com>,
	Zhangshaokun <zhangshaokun@hisilicon.com>
Subject: Re: [PATCH v10 5/7] perf: cavium: Support memory controller PMU counters
Date: Thu, 9 Nov 2017 10:07:02 +0000	[thread overview]
Message-ID: <6ff478bb-ebaf-da43-3ee8-2889209278ca@arm.com> (raw)
In-Reply-To: <20170925123502.17289-6-jglauber@cavium.com>

On 25/09/17 13:35, Jan Glauber wrote:
> Add support for the PMU counters on Cavium SOC memory controllers.
> 
> This patch also adds generic functions to allow supporting more
> devices with PMU counters.
> 
> Properties of the LMC PMU counters:
> - not stoppable
> - fixed purpose
> - read-only
> - one PCI device per memory controller
> 
> Signed-off-by: Jan Glauber <jglauber@cavium.com>
> ---
>   drivers/perf/Kconfig            |   8 +
>   drivers/perf/Makefile           |   1 +
>   drivers/perf/cavium_pmu.c       | 430 ++++++++++++++++++++++++++++++++++++++++
>   drivers/soc/cavium/cavium_lmc.c |   4 +
>   include/linux/cpuhotplug.h      |   1 +
>   include/linux/soc/cavium/lmc.h  |   3 +
>   6 files changed, 447 insertions(+)
>   create mode 100644 drivers/perf/cavium_pmu.c

> +int cvm_lmc_pmu_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
> +{
> +	struct cvm_pmu_dev *next, *lmc;
> +	int nr = 0, ret = -ENOMEM;
> +	char *name;
> +
> +	lmc = devm_kzalloc(&pdev->dev, sizeof(*lmc), GFP_KERNEL);
> +	if (!lmc)
> +		return -ENOMEM;
> +
> +	lmc->map = devm_ioremap(&pdev->dev, pci_resource_start(pdev, 0),
> +				pci_resource_len(pdev, 0));
> +	if (!lmc->map)
> +		return -EINVAL;
> +
> +	list_for_each_entry(next, &cvm_pmu_lmcs, entry)
> +		nr++;
> +	name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "lmc%d", nr);
> +	if (!name)
> +		return -ENOMEM;
> +
> +	lmc->pdev = pdev;
> +	lmc->num_counters = ARRAY_SIZE(cvm_pmu_lmc_events_attr) - 1;
> +	lmc->pmu = (struct pmu) {
> +		.task_ctx_nr    = perf_invalid_context,
> +		.name		= name,
> +		.event_init	= cvm_pmu_event_init,
> +		.add		= cvm_pmu_lmc_add,
> +		.del		= cvm_pmu_del,
> +		.start		= cvm_pmu_start,
> +		.stop		= cvm_pmu_stop,
> +		.read		= cvm_pmu_read,
> +		.attr_groups	= cvm_pmu_lmc_attr_groups,
> +	};
> +

You need to fill in the "module" field of the PMU to prevent the module from
being unloaded while the PMU is active.

See :

http://lists.infradead.org/pipermail/linux-arm-kernel/2017-November/540647.html

Suzuki

  reply	other threads:[~2017-11-09 10:07 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-09-25 12:34 [PATCH v10 0/7] Cavium ARM64 uncore PMU support Jan Glauber
2017-09-25 12:34 ` [PATCH v10 1/7] edac: thunderx: Remove suspend/resume support Jan Glauber
2017-09-27 15:48   ` Borislav Petkov
2017-09-25 12:34 ` [PATCH v10 2/7] perf: export perf_event_update_userpage() Jan Glauber
2017-09-25 12:34 ` [PATCH v10 3/7] edac,soc: thunderx: Add wrapper for EDAC LMC PCI device Jan Glauber
2017-09-27 16:19   ` Borislav Petkov
2017-10-02 15:17     ` Jan Glauber
2017-10-04 10:34       ` Borislav Petkov
2017-09-25 12:34 ` [PATCH v10 4/7] edac,soc: thunderx: Add wrapper for EDAC OCX " Jan Glauber
2017-09-25 12:35 ` [PATCH v10 5/7] perf: cavium: Support memory controller PMU counters Jan Glauber
2017-11-09 10:07   ` Suzuki K Poulose [this message]
2017-09-25 12:35 ` [PATCH v10 6/7] perf: cavium: Support transmit-link " Jan Glauber
2017-09-27 15:48   ` Jonathan Cameron
2017-09-25 12:35 ` [PATCH v10 7/7] perf: cavium: Add Documentation Jan Glauber

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