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From: Icenowy Zheng <icenowy@nucleisys.com>
To: Rob Herring <robh+dt@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>
Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	linux-riscv@lists.infradead.org, linux-serial@vger.kernel.org,
	linux-spi@vger.kernel.org
Subject: Re: [PATCH 00/12] Initial support for Nuclei DemoSoC w/ UX600
Date: Sat, 19 Feb 2022 22:45:43 +0800	[thread overview]
Message-ID: <6ff70d9fbbfcde860823aa24f0ce58a0a96a1c91.camel@nucleisys.com> (raw)
In-Reply-To: <20220127151647.2375449-1-icenowy@nucleisys.com>

在 2022-01-27星期四的 23:16 +0800,Icenowy Zheng写道:
> This patchset adds support for Nuclei DemoSoC (which is an evaluation
> platform made with Nuclei CPU cores and mainly peripherals in
> original
> Hummingbird E203 project, running on FPGA) with UX600 CPU cores.
> 
> Most patches are for DT bindings, the remaining ones are adding a
> Kconfig option and some DTS/DTSI files. The last one is a workaround
> for
> a severe bug in currently released versions of UX600, which is found
> in 5.17 kernel, in which Sv48 support is added to Linux.
> 
> Two non-technical patches are in this patchset too, for MAINTAINERS
> and .mailmap items.

Ping, could any RISC-V maintainers review these patches, especially the
SATP workaround one?

> 
> Icenowy Zheng (12):
>   dt-bindings: vendor-prefixes: add Nuclei
>   RISC-V: add Nuclei SoC Kconfig option
>   dt-bindings: riscv: add compatible strings for Nuclei UX600 series
>   dt-bindings: timer: add compatible for Nuclei UX600 CLINT-compat
> timer
>   dt-bindings: interrupt-controller: add compatible string for UX600
>     PLIC
>   dt-bindings: serial: add compatible string for Nuclei DemoSoC UART
>   dt-bindings: spi: add compatible string for Nuclei DemoSoC SPI
>   dt-bindings: riscv: add binding for Nuclei platform boards
>   riscv: dts: add device tree for Nuclei DemoSoC w/ UX600 on DDR200T
>   RISC-V: workaround Nuclei UX600 cores with broken SATP CSR
>   MAINTAINERS: add myself as Nuclei SoCs/CPUs supporter
>   mailmap: add Icenowy Zheng's Nuclei mail addresses
> 
>  .mailmap                                      |  1 +
>  .../sifive,plic-1.0.0.yaml                    |  1 +
>  .../devicetree/bindings/riscv/cpus.yaml       |  7 ++
>  .../devicetree/bindings/riscv/nuclei.yaml     | 27 ++++++++
>  .../bindings/serial/sifive-serial.yaml        |  1 +
>  .../devicetree/bindings/spi/spi-sifive.yaml   |  1 +
>  .../bindings/timer/sifive,clint.yaml          |  1 +
>  .../devicetree/bindings/vendor-prefixes.yaml  |  2 +
>  MAINTAINERS                                   |  7 ++
>  arch/riscv/Kconfig.socs                       |  6 ++
>  arch/riscv/boot/dts/Makefile                  |  1 +
>  arch/riscv/boot/dts/nuclei/Makefile           |  2 +
>  .../dts/nuclei/nuclei-demosoc-ddr200t.dtsi    | 41 ++++++++++++
>  .../nuclei/nuclei-demosoc-ux600-ddr200t.dts   | 13 ++++
>  .../boot/dts/nuclei/nuclei-demosoc-ux600.dtsi | 49 ++++++++++++++
>  .../riscv/boot/dts/nuclei/nuclei-demosoc.dtsi | 67
> +++++++++++++++++++
>  arch/riscv/include/asm/vendorid_list.h        |  1 +
>  arch/riscv/mm/init.c                          | 17 +++++
>  18 files changed, 245 insertions(+)
>  create mode 100644
> Documentation/devicetree/bindings/riscv/nuclei.yaml
>  create mode 100644 arch/riscv/boot/dts/nuclei/Makefile
>  create mode 100644 arch/riscv/boot/dts/nuclei/nuclei-demosoc-
> ddr200t.dtsi
>  create mode 100644 arch/riscv/boot/dts/nuclei/nuclei-demosoc-ux600-
> ddr200t.dts
>  create mode 100644 arch/riscv/boot/dts/nuclei/nuclei-demosoc-
> ux600.dtsi
>  create mode 100644 arch/riscv/boot/dts/nuclei/nuclei-demosoc.dtsi
> 



  parent reply	other threads:[~2022-02-19 14:46 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-27 15:16 Icenowy Zheng
2022-01-27 15:16 ` [PATCH 01/12] dt-bindings: vendor-prefixes: add Nuclei Icenowy Zheng
2022-02-09  4:03   ` Rob Herring
2022-01-27 15:16 ` [PATCH 02/12] RISC-V: add Nuclei SoC Kconfig option Icenowy Zheng
2022-01-27 15:16 ` [PATCH 03/12] dt-bindings: riscv: add compatible strings for Nuclei UX600 series Icenowy Zheng
2022-02-09  4:05   ` Rob Herring
2022-01-27 15:16 ` [PATCH 04/12] dt-bindings: timer: add compatible for Nuclei UX600 CLINT-compat timer Icenowy Zheng
2022-02-09  4:05   ` Rob Herring
2022-01-27 15:16 ` [PATCH 05/12] dt-bindings: interrupt-controller: add compatible string for UX600 PLIC Icenowy Zheng
2022-02-09  4:05   ` Rob Herring
2022-01-27 15:16 ` [PATCH 06/12] dt-bindings: serial: add compatible string for Nuclei DemoSoC UART Icenowy Zheng
2022-02-09  4:06   ` Rob Herring
2022-01-27 15:16 ` [PATCH 07/12] dt-bindings: spi: add compatible string for Nuclei DemoSoC SPI Icenowy Zheng
2022-02-09  4:06   ` Rob Herring
2022-01-27 15:16 ` [PATCH 08/12] dt-bindings: riscv: add binding for Nuclei platform boards Icenowy Zheng
2022-02-09  4:07   ` Rob Herring
2022-01-27 15:16 ` [PATCH 09/12] riscv: dts: add device tree for Nuclei DemoSoC w/ UX600 on DDR200T Icenowy Zheng
2022-01-27 15:16 ` [PATCH 10/12] RISC-V: workaround Nuclei UX600 cores with broken SATP CSR Icenowy Zheng
2022-01-27 15:16 ` [PATCH 11/12] MAINTAINERS: add myself as Nuclei SoCs/CPUs supporter Icenowy Zheng
2022-01-27 15:16 ` [PATCH 12/12] mailmap: add Icenowy Zheng's Nuclei mail addresses Icenowy Zheng
2022-02-19 14:45 ` Icenowy Zheng [this message]
2022-02-22 16:56   ` [PATCH 00/12] Initial support for Nuclei DemoSoC w/ UX600 Palmer Dabbelt
2022-03-22  0:05     ` Palmer Dabbelt
2022-04-13 21:52       ` Palmer Dabbelt

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