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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b842a511085sm1057781466b.46.2026.01.09.02.15.04 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 09 Jan 2026 02:15:05 -0800 (PST) Message-ID: <701000c2-11c1-4690-8d6e-0ac79572cea5@oss.qualcomm.com> Date: Fri, 9 Jan 2026 11:15:03 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 0/3] Retrieve information about DDR from SMEM To: Neil Armstrong , Konrad Dybcio , Bjorn Andersson , Kees Cook , "Gustavo A. R. Silva" , Rob Clark , Sean Paul , Akhil P Oommen , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Marijn Suijten , David Airlie , Simona Vetter Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-hardening@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org References: <20260108-topic-smem_dramc-v3-0-6b64df58a017@oss.qualcomm.com> <6ef89318-5fa4-47f5-8027-04a91656d81e@linaro.org> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <6ef89318-5fa4-47f5-8027-04a91656d81e@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Authority-Analysis: v=2.4 cv=YNiSCBGx c=1 sm=1 tr=0 ts=6960d52c cx=c_pps a=HLyN3IcIa5EE8TELMZ618Q==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=vUbySO9Y5rIA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=P3zdcL2LA7wxMbYDQFIA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=bTQJ7kPSJx9SKPbeHEYW:22 X-Proofpoint-GUID: rUiKrh7i49wABfyqDzTbpFomhjyYntfo X-Proofpoint-ORIG-GUID: rUiKrh7i49wABfyqDzTbpFomhjyYntfo X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTA5MDA3MyBTYWx0ZWRfX7p2fQoJbCIGV QQl3dgwCsiWtkq+IY02qneuWdoO3IfH3TKIGa+I0oD/5PPns243Mhf/yWrEzR0rk7GiO4JBzjc5 MBAUNmWshjkSdMymxm18iMNlz+bxykWUCrjtnvLoQve2PcWMycflsaY6DhwtKYVUZKGkJAxImeN v3WdO2yxtmcUNdL33N4i1uhdiy+dOwQMauuB/SuPjSO5VJbsaDI/TZ0YnV7VzQ1Yl1NAi7dcJq4 IUYjB7LzXhv2rV6SBSXeUuDn/Q4DBIOQa4CaqnOIZQo/RHhl3NsBtm8oDasKKxM9Ras5qyf5gG4 k/Nj695YQJilo+9/Hlm2delvgtFtSI7xQYF9nq1BAU1F5EImWXS64/FHnPgfY0z0NK9lKYUbBDs 4caV4ox3Uv1W2SK8ilv2hYbbWYrO2UjR1+O8y1hvPgZqGQUKFbiuDdyjsuNIkEaY5fQqFuKluKK hzjN1vUpblspb5F1iRA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2026-01-09_03,2026-01-08_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 suspectscore=0 impostorscore=0 adultscore=0 spamscore=0 lowpriorityscore=0 malwarescore=0 bulkscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2512120000 definitions=main-2601090073 On 1/9/26 9:20 AM, Neil Armstrong wrote: > Hi, > > On 1/8/26 15:21, Konrad Dybcio wrote: >> SMEM allows the OS to retrieve information about the DDR memory. >> Among that information, is a semi-magic value called 'HBB', or Highest >> Bank address Bit, which multimedia drivers (for hardware like Adreno >> and MDSS) must retrieve in order to program the IP blocks correctly. >> >> This series introduces an API to retrieve that value, uses it in the >> aforementioned programming sequences and exposes available DDR >> frequencies in debugfs (to e.g. pass to aoss_qmp debugfs). More >> information can be exposed in the future, as needed. >> >> Patch 3 should really be merged after 1&2 > > > While trying it, I got the following warning: > > In function ‘smem_dram_parse_v3_data’, >     inlined from ‘smem_dram_parse’ at drivers/soc/qcom/smem_dramc.c:380:3: > drivers/soc/qcom/smem_dramc.c:216:31: warning: iteration 13 invokes undefined behavior [-Waggressive-loop-optimizations] >   216 |                 if (freq_entry->freq_khz && freq_entry->enabled) >       |                     ~~~~~~~~~~^~~~~~~~~~ > drivers/soc/qcom/smem_dramc.c:213:27: note: within this loop >   213 |         for (int i = 0; i < num_freq_entries; i++) { >       |                         ~~^~~~~~~~~~~~~~~~~~ clang didn't seem to care.. A (really grumpy) solution would be to add: diff --git a/drivers/soc/qcom/smem_dramc.c b/drivers/soc/qcom/smem_dramc.c index 017bb894a91b..dc2cd7e13b88 100644 --- a/drivers/soc/qcom/smem_dramc.c +++ b/drivers/soc/qcom/smem_dramc.c @@ -78,7 +78,7 @@ struct ddr_freq_table { /* V3 */ struct ddr_freq_plan_v3 { - struct ddr_freq_table ddr_freq[MAX_DDR_FREQ_NUM_V3]; /* NOTE: some have 14 like v5 */ + struct ddr_freq_table ddr_freq[MAX_DDR_FREQ_NUM_V3]; u8 num_ddr_freqs; phys_addr_t clk_period_address; }; @@ -91,6 +91,21 @@ struct ddr_details_v3 { u8 num_channels; }; +/* Some V3 structs have an additional frequency level */ +struct ddr_freq_plan_v3_14freqs { + struct ddr_freq_table ddr_freq[MAX_DDR_FREQ_NUM_V3 + 1]; + u8 num_ddr_freqs; + phys_addr_t clk_period_address; +}; + +struct ddr_details_v3_14freqs { + u8 manufacturer_id; + u8 device_type; + struct ddr_part_details ddr_params[MAX_CHAN_NUM]; + struct ddr_freq_plan_v3_14freqs ddr_freq_tbl; + u8 num_channels; +}; + /* V4 */ struct ddr_details_v4 { u8 manufacturer_id; @@ -201,16 +216,11 @@ int qcom_smem_dram_get_hbb(void) } EXPORT_SYMBOL_GPL(qcom_smem_dram_get_hbb); -static void smem_dram_parse_v3_data(struct smem_dram *dram, void *data, bool additional_freq_entry) +static void smem_dram_parse_v3_data(struct smem_dram *dram, void *data) { - /* This may be 13 or 14 */ - int num_freq_entries = MAX_DDR_FREQ_NUM_V3; struct ddr_details_v3 *details = data; - if (additional_freq_entry) - num_freq_entries++; - - for (int i = 0; i < num_freq_entries; i++) { + for (int i = 0; i < MAX_DDR_FREQ_NUM_V3; i++) { struct ddr_freq_table *freq_entry = &details->ddr_freq_tbl.ddr_freq[i]; if (freq_entry->freq_khz && freq_entry->enabled) @@ -218,6 +228,18 @@ static void smem_dram_parse_v3_data(struct smem_dram *dram, void *data, bool add } } +static void smem_dram_parse_v3_14freqs_data(struct smem_dram *dram, void *data) +{ + struct ddr_details_v3_14freqs *details = data; + + for (int i = 0; i < MAX_DDR_FREQ_NUM_V3 + 1; i++) { + struct ddr_freq_table *freq_entry = &details->ddr_freq_tbl.ddr_freq[i]; + + if (freq_entry->freq_khz && freq_entry->enabled) + dram->frequencies[dram->num_frequencies++] = 1000 * freq_entry->freq_khz; + } +} + static void smem_dram_parse_v4_data(struct smem_dram *dram, void *data) { struct ddr_details_v4 *details = data; @@ -273,8 +295,7 @@ static int smem_dram_infer_struct_version(size_t size) if (size == sizeof(struct ddr_details_v3)) return INFO_V3; - if (size == sizeof(struct ddr_details_v3) - + sizeof(struct ddr_freq_table)) + if (size == sizeof(struct ddr_details_v3_14freqs)) return INFO_V3_WITH_14_FREQS; if (size == sizeof(struct ddr_details_v4)) @@ -374,10 +395,10 @@ struct dentry *smem_dram_parse(struct device *dev) switch (ver) { case INFO_V3: - smem_dram_parse_v3_data(dram, data, false); + smem_dram_parse_v3_data(dram, data); break; case INFO_V3_WITH_14_FREQS: - smem_dram_parse_v3_data(dram, data, true); + smem_dram_parse_v3_14freqs_data(dram, data); break; case INFO_V4: smem_dram_parse_v4_data(dram, data); A less grumpy one that I'm not sure would make the compiler happy would be: diff --git a/drivers/soc/qcom/smem_dramc.c b/drivers/soc/qcom/smem_dramc.c index 017bb894a91b..3653402fa70c 100644 --- a/drivers/soc/qcom/smem_dramc.c +++ b/drivers/soc/qcom/smem_dramc.c @@ -206,15 +206,16 @@ static void smem_dram_parse_v3_data(struct smem_dram *dram, void *data, bool add /* This may be 13 or 14 */ int num_freq_entries = MAX_DDR_FREQ_NUM_V3; struct ddr_details_v3 *details = data; + struct ddr_freq_table *freq_entry; if (additional_freq_entry) num_freq_entries++; - for (int i = 0; i < num_freq_entries; i++) { - struct ddr_freq_table *freq_entry = &details->ddr_freq_tbl.ddr_freq[i]; + freq_entry = details->ddr_freq_tbl.ddr_freq; + for (int i = 0; i < num_freq_entries; i++) { if (freq_entry->freq_khz && freq_entry->enabled) - dram->frequencies[dram->num_frequencies++] = 1000 * freq_entry->freq_khz; + dram->frequencies[dram->num_frequencies++] = 1000 * (freq_entry++)->freq_khz; } } WDYT? Konrad