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From: Daniel Golle <daniel@makrotopia.org>
To: netdev@vger.kernel.org, linux-mediatek@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, Andrew Lunn <andrew@lunn.ch>,
	Heiner Kallweit <hkallweit1@gmail.com>,
	Russell King <linux@armlinux.org.uk>,
	"David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	AngeloGioacchino Del Regno 
	<angelogioacchino.delregno@collabora.com>
Subject: [PATCH net-next 8/8] net: phy: realtek: setup ALDPS on RTL8221B
Date: Thu, 11 May 2023 01:00:21 +0200	[thread overview]
Message-ID: <701034ea45c08db557af926a5a44113e4e45c634.1683756691.git.daniel@makrotopia.org> (raw)
In-Reply-To: <cover.1683756691.git.daniel@makrotopia.org>

Setup Link Down Power Saving Mode according the DTS property
just like for RTL821x 1GE PHYs.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
 drivers/net/phy/realtek.c | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
index 29168f98f451..b5d7208004d8 100644
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -62,6 +62,10 @@
 #define RTL8221B_SERDES_OPTION_MODE_2500BASEX		2
 #define RTL8221B_SERDES_OPTION_MODE_HISGMII		3
 
+#define RTL8221B_PHYCR1				0xa430
+#define RTL8221B_PHYCR1_ALDPS_EN		BIT(2)
+#define RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN	BIT(12)
+
 #define RTL8366RB_POWER_SAVE			0x15
 #define RTL8366RB_POWER_SAVE_ON			BIT(12)
 
@@ -757,6 +761,25 @@ static int rtl8226_match_phy_device(struct phy_device *phydev)
 	       rtlgen_supports_2_5gbps(phydev);
 }
 
+static int rtl822x_probe(struct phy_device *phydev)
+{
+	struct device *dev = &phydev->mdio.dev;
+	int val;
+
+	val = phy_read_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, RTL8221B_PHYCR1);
+	if (val < 0)
+		return val;
+
+	if (of_property_read_bool(dev->of_node, "realtek,aldps-enable"))
+		val |= RTL8221B_PHYCR1_ALDPS_EN | RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN;
+	else
+		val &= ~(RTL8221B_PHYCR1_ALDPS_EN | RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN);
+
+	phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, RTL8221B_PHYCR1, val);
+
+	return 0;
+}
+
 static int rtlgen_resume(struct phy_device *phydev)
 {
 	int ret = genphy_resume(phydev);
@@ -1034,6 +1057,7 @@ static struct phy_driver realtek_drvs[] = {
 		.match_phy_device = rtl8226_match_phy_device,
 		.get_features	= rtl822x_get_features,
 		.config_aneg	= rtl822x_config_aneg,
+		.probe          = rtl822x_probe,
 		.read_status	= rtl822x_read_status,
 		.suspend	= genphy_suspend,
 		.resume		= rtlgen_resume,
@@ -1048,6 +1072,7 @@ static struct phy_driver realtek_drvs[] = {
 		.get_features	= rtl822x_get_features,
 		.config_aneg	= rtl822x_config_aneg,
 		.config_init	= rtl8221b_config_init,
+		.probe          = rtl822x_probe,
 		.read_status	= rtl822x_read_status,
 		.suspend	= genphy_suspend,
 		.resume		= rtlgen_resume,
@@ -1061,6 +1086,7 @@ static struct phy_driver realtek_drvs[] = {
 		.name           = "RTL8226-CG 2.5Gbps PHY",
 		.get_features   = rtl822x_get_features,
 		.config_aneg    = rtl822x_config_aneg,
+		.probe          = rtl822x_probe,
 		.read_status    = rtl822x_read_status,
 		.suspend        = genphy_suspend,
 		.resume         = rtlgen_resume,
@@ -1073,6 +1099,7 @@ static struct phy_driver realtek_drvs[] = {
 		.get_features   = rtl822x_get_features,
 		.config_aneg    = rtl822x_config_aneg,
 		.config_init    = rtl8221b_config_init,
+		.probe          = rtl822x_probe,
 		.read_status    = rtl822x_read_status,
 		.suspend        = genphy_suspend,
 		.resume         = rtlgen_resume,
@@ -1085,6 +1112,7 @@ static struct phy_driver realtek_drvs[] = {
 		.get_features   = rtl822x_get_features,
 		.config_aneg    = rtl822x_config_aneg,
 		.config_init    = rtl8221b_config_init,
+		.probe          = rtl822x_probe,
 		.read_status    = rtl822x_read_status,
 		.suspend        = genphy_suspend,
 		.resume         = rtlgen_resume,
@@ -1097,6 +1125,7 @@ static struct phy_driver realtek_drvs[] = {
 		.get_features   = rtl822x_get_features,
 		.config_aneg    = rtl822x_config_aneg,
 		.config_init    = rtl8221b_config_init,
+		.probe          = rtl822x_probe,
 		.read_status    = rtl822x_read_status,
 		.suspend        = genphy_suspend,
 		.resume         = rtlgen_resume,
-- 
2.40.0


  parent reply	other threads:[~2023-05-10 23:02 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-10 22:53 [PATCH net-next 0/8] Improvements for RealTek 2.5G Ethernet PHYs Daniel Golle
2023-05-10 22:53 ` [PATCH net-next 1/8] net: phy: realtek: rtl8221: allow to configure SERDES mode Alexander Couzens
2023-05-10 22:56   ` [PATCH " Daniel Golle
2023-05-11  0:34   ` Andrew Lunn
2023-05-11  0:38   ` Andrew Lunn
2023-05-11 11:50     ` Daniel Golle
2023-05-11  0:41   ` Andrew Lunn
2023-05-11 11:53     ` Daniel Golle
2023-05-11  7:53   ` [PATCH net-next " Steen Hegelund
2023-05-10 22:54 ` [PATCH net-next 2/8] net: phy: realtek: switch interface mode for RTL822x series Chukun Pan
2023-05-10 22:57   ` Daniel Golle
2023-05-10 22:55 ` [PATCH net-next 3/8] net: phy: realtek: use genphy_soft_reset for 2.5G PHYs Daniel Golle
2023-05-10 22:57   ` Daniel Golle
2023-05-10 22:58 ` [PATCH net-next 4/8] net: phy: realtek: disable SGMII in-band AN " Daniel Golle
2023-05-10 22:58 ` [PATCH net-next 5/8] net: phy: realtek: make sure paged read is protected by mutex Daniel Golle
2023-05-10 22:59 ` [PATCH net-next 6/8] net: phy: realtek: use inline functions for 10GbE advertisement Daniel Golle
2023-05-10 22:59 ` [PATCH net-next 7/8] net: phy: realtek: check validity of 10GbE link-partner advertisement Daniel Golle
2023-05-10 23:00 ` Daniel Golle [this message]
2023-05-11  0:28 ` [PATCH net-next 0/8] Improvements for RealTek 2.5G Ethernet PHYs Andrew Lunn
2023-05-11 17:14   ` Daniel Golle
2023-05-11 17:30     ` Russell King (Oracle)
2023-05-11 18:09       ` Russell King (Oracle)
2023-05-13 17:52         ` Daniel Golle
2023-05-13 19:24           ` Russell King (Oracle)
2023-05-11  5:29 ` Heiner Kallweit
2023-05-11 11:44   ` Daniel Golle

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