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From: Kishon Vijay Abraham I <kishon@ti.com>
To: Steen Hegelund <steen.hegelund@microchip.com>,
	Vinod Koul <vkoul@kernel.org>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>,
	Lars Povlsen <lars.povlsen@microchip.com>,
	Bjarni Jonasson <bjarni.jonasson@microchip.com>,
	Microchip UNG Driver List <UNGLinuxDriver@microchip.com>,
	<netdev@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	Andrew Lunn <andrew@lunn.ch>
Subject: Re: [PATCH v12 2/4] phy: Add ethernet serdes configuration option
Date: Wed, 27 Jan 2021 18:04:53 +0530	[thread overview]
Message-ID: <70aa5716-bd14-0a0a-26bc-d3dfa23de47e@ti.com> (raw)
In-Reply-To: <f35e3c33f011b6aabd96d3b6de3750bf3d04b699.camel@microchip.com>

Hi Steen,

On 15/01/21 9:44 pm, Steen Hegelund wrote:
> Hi Kishon,
> 
> On Fri, 2021-01-15 at 21:22 +0530, Kishon Vijay Abraham I wrote:
>> EXTERNAL EMAIL: Do not click links or open attachments unless you
>> know the content is safe
>>
>> Hi,
>>
>> On 07/01/21 2:49 pm, Steen Hegelund wrote:
>>> Provide a new ethernet phy configuration structure, that
>>> allow PHYs used for ethernet to be configured with
>>> speed, media type and clock information.
>>>
>>> Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
>>> Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com>
>>> Reviewed-by: Andrew Lunn <andrew@lunn.ch>
>>> ---
>>>  include/linux/phy/phy-ethernet-serdes.h | 30
>>> +++++++++++++++++++++++++
>>>  include/linux/phy/phy.h                 |  4 ++++
>>>  2 files changed, 34 insertions(+)
>>>  create mode 100644 include/linux/phy/phy-ethernet-serdes.h
>>>
>>> diff --git a/include/linux/phy/phy-ethernet-serdes.h
>>> b/include/linux/phy/phy-ethernet-serdes.h
>>> new file mode 100644
>>> index 000000000000..d2462fadf179
>>> --- /dev/null
>>> +++ b/include/linux/phy/phy-ethernet-serdes.h
>>> @@ -0,0 +1,30 @@
>>> +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
>>> +/*
>>> + * Microchip Sparx5 Ethernet SerDes driver
>>> + *
>>> + * Copyright (c) 2020 Microschip Inc
>>> + */
>>> +#ifndef __PHY_ETHERNET_SERDES_H_
>>> +#define __PHY_ETHERNET_SERDES_H_
>>> +
>>> +#include <linux/types.h>
>>> +
>>> +enum ethernet_media_type {
>>> +     ETH_MEDIA_DEFAULT,
>>> +     ETH_MEDIA_SR,
>>> +     ETH_MEDIA_DAC,
>>> +};
>>
>> I'm not familiar with Ethernet. Are these generic media types? what
>> does
>> SR or DAC refer to? 
> 
> The SR stands for Short Reach and is a fiber type connection used by
> SFPs.  There also other "reach" variants.
> 
> DAC stands for Direct Attach Copper and is a type of cable that plugs
> into an SFP cage and provides information back to the user via its
> EEPROM regarding supported speed and capabilities in general.  These
> typically supports speed of 5G or more.
> 
> The SFP/Phylink is the "out-of-band" method that provides the type of
> connection: speed and media type that allows the client to adapt the
> SerDes configuration to the type of media selected by the user.
> 
>> Are there other media types? What is the out-of-band
>> mechanism by which the controller gets the media type? Why was this
>> not
>> required for other existing Ethernet SERDES? 
> 
> This is probably a matter of the interface speed are now getting higher
> and the amount of configuration needed for the SerDes have increased,
> at the same time as this is not being a static setup, because the user
> an plug and unplug media to the SFP cage.
> 
>> Are you aware of any other
>> vendors who might require this?
> 
> I suspect that going forward it will become more widespread, at least
> we have more chips in the pipeline that need this SerDes for high speed
> connectivity.

For this case I would recommend to add new API, something like
phy_set_media(). Configure() and Validate() is more for probing
something that is supported by SERDES and changing the parameters. But
in this case, I'd think the media type is determined by the cable that
is connected and cannot be changed.

Thanks
Kishon

  reply	other threads:[~2021-01-27 12:40 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-07  9:19 [PATCH v12 0/4] Adding the Sparx5 Serdes driver Steen Hegelund
2021-01-07  9:19 ` [PATCH v12 1/4] dt-bindings: phy: Add sparx5-serdes bindings Steen Hegelund
2021-01-14 11:02   ` Alexandre Belloni
2021-01-07  9:19 ` [PATCH v12 2/4] phy: Add ethernet serdes configuration option Steen Hegelund
2021-01-14 11:02   ` Alexandre Belloni
2021-01-15  8:44   ` Kishon Vijay Abraham I
2021-01-15  9:08     ` Steen Hegelund
2021-01-15 15:52   ` Kishon Vijay Abraham I
2021-01-15 16:14     ` Steen Hegelund
2021-01-27 12:34       ` Kishon Vijay Abraham I [this message]
2021-01-27 14:45         ` Steen Hegelund
2021-01-22 15:07     ` Steen Hegelund
2021-01-07  9:19 ` [PATCH v12 3/4] phy: Add Sparx5 ethernet serdes PHY driver Steen Hegelund
2021-01-14 11:03   ` Alexandre Belloni
2021-01-07  9:19 ` [PATCH v12 4/4] arm64: dts: sparx5: Add Sparx5 serdes driver node Steen Hegelund
2021-01-14 11:03   ` Alexandre Belloni

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