From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 3E999345ED1 for ; Thu, 23 Jul 2026 05:56:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784786214; cv=none; b=WDFYM/ZO6aKulcxQAWyUb8aKl9DZ65ikxexlwr6TtuHyDLakn7G4fev8Zitn0VXj9KEJhSuVydWVSSAkxrGSKWpjQmdNx2cowYzrbz4JKW+JOveAjKoR9fEoI5si7norU2sgMmpNLOlJrK0XJhV92t7HpsGJWukRHeQElriB3KI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784786214; c=relaxed/simple; bh=KcTgjcA70uHRnfNgnpW+62gzgY1lyZt3T5+9Cc8aQjk=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=ajMRq4RZ9OHf0jyO+qOYC9IK2IMLWrxquw5QqjPVBThx2Z3QWNCUWBQoWkaxGAgy3FQy0rkpBpDbUx8hIiht3cCiZIiXT8j8WbZJMOh/EtyykW1FjHyljmZc+p8rqcgxraxUwg4THZvMu1WfKCxNIrSjcyCB7OHckM6x2rZ8SA0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=uMlYCK/Z; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="uMlYCK/Z" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C26761595; Wed, 22 Jul 2026 22:56:46 -0700 (PDT) Received: from [10.163.164.40] (unknown [10.163.164.40]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D6B183F66F; Wed, 22 Jul 2026 22:56:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1784786210; bh=KcTgjcA70uHRnfNgnpW+62gzgY1lyZt3T5+9Cc8aQjk=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=uMlYCK/ZZIGP3HbtRNdq+Fm0VXtKTnfAr36S56S1rMUqVyuneRX2WrHTtJqGoqkw4 Ip+fLIXXW1O/dm9yAuhGb640Ed+ZCxFgn4py8b1G2AXme6UxLvXttA8l4C0rrzP2V7 7FIrTRK3FzlsdIreST9KI2TdioJgmYwOnypgakJ4= Message-ID: <70e8596f-7316-4cc9-90e8-ff06a94c4616@arm.com> Date: Thu, 23 Jul 2026 11:26:43 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] arm64: smp: distinguish secondary CPUs that hang after reaching head.S To: Jinjie Ruan , Naman Jain , Catalin Marinas , Will Deacon Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Marc Zyngier , Thomas Huth , Fuad Tabba , Thomas Gleixner , Pengjie Zhang , mrigendrachaubey , Saurabh Sengar References: <20260722113044.1835365-1-namjain@linux.microsoft.com> <6e13c10f-ccc2-48c3-bf8a-d65133a33e17@huawei.com> Content-Language: en-US From: Anshuman Khandual In-Reply-To: <6e13c10f-ccc2-48c3-bf8a-d65133a33e17@huawei.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 23/07/26 8:19 AM, Jinjie Ruan wrote: > > 在 2026/7/22 19:30, Naman Jain 写道: >> When a secondary CPU fails to come online, __cpu_up() falls back to >> __early_cpu_boot_status, but boot status 0x0 is ambiguous: it cannot >> distinguish a CPU that never executed head.S (firmware/hypervisor never >> dispatched it, so it never ran a single instruction) from one that >> entered head.S, started executing, and then got stuck somewhere in kernel >> bring-up. Add a change to let us tell those two cases apart, which >> narrows down where to look when a CPU goes missing during boot. > I previously encountered this issue when debugging the parallel startup > of ARM64 secondary cores. It is difficult for the kernel to determine > whether the secondary core is hung in the firmware or whether it has not > executed a single instruction. So I think this motive is reasonable. Why should kernel determine the difference here ? Would not the firmware know if it has started any secondary CPU for the kernel which must have come inside head.S ? If the cpu gets hung inside firmware while starting up then the debug responsibilities belong there instead. Still wondering what's the rationale for this change.