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From: "Christian König" <deathsimple@vodafone.de>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
	platform-driver-x86@vger.kernel.org
Subject: Re: [PATCH 2/4] PCI: add functionality for resizing resources v2
Date: Tue, 11 Apr 2017 17:37:04 +0200	[thread overview]
Message-ID: <70ea3ef3-10a6-01f1-125c-dbf89e87b1d0@vodafone.de> (raw)
In-Reply-To: <20170324213445.GF25380@bhelgaas-glaptop.roam.corp.google.com>

Hi Bjorn,

first of all sorry for the delay, had been busy with other stuff in the 
last few weeks.

Am 24.03.2017 um 22:34 schrieb Bjorn Helgaas:
>> +			release_child_resources(res);
> Doesn't this recursively release *all* child resources?  There could
> be BARs from several devices, or even windows of downstream bridges,
> inside this window.  The drivers of those other devices aren't
> expecting things to change here.

Yes, the original idea was that the driver calling this knows that the 
BARs will be changed for the bridge it belongs to.

But you're right. I've changed it in the way that our device driver will 
release all resource first and then call the function to resize its BAR.

The function will return an error in the next version of the patch if 
the bridge BAR which needs to be moved for this is still used by child 
resources.

>> +int pci_resize_resource(struct pci_dev *dev, int resno, int size)
>> +{
>> +	struct resource *res = dev->resource + resno;
>> +	u32 sizes = pci_rbar_get_possible_sizes(dev, resno);
>> +	int old = pci_rbar_get_current_size(dev, resno);
>> +	u64 bytes = 1ULL << (size + 20);
>> +	int ret = 0;
> I think we should fail the request if the device is enabled, i.e., if
> the PCI_COMMAND_MEMORY bit is set.  We can't safely change the BAR
> while memory decoding is enabled.
>
> I know there's code in pci_std_update_resource() that turns off
> PCI_COMMAND_MEMORY, but I think that's a mistake: I think it should
> fail when asked to update an enabled BAR the same way
> pci_iov_update_resource() does.
>
> I'm not sure why you call pci_reenable_device() below, but I think I
> would rather have the driver do something like this:
>
>    pci_disable_device(dev);
>    pci_resize_resource(dev, 0, size);
>    pci_enable_device(dev);
>
> That way it's very clear to the driver that it must re-read all BARs
> after resizing this one.

I've tried it, but this actually doesn't seem to work.

At least on the board I've tried pci_disable_device() doesn't clear the 
PCI_COMMAND_MEMORY bit, it just clears the master bit.

Additional to that the power management reference counting 
pci_disable_device() and pci_enable_device() doesn't look like what I 
want for this functionality.

How about the driver needs to disabled memory decoding itself before 
trying to resize anything?

>> +	if (!sizes)
>> +		return -ENOTSUPP;
>> +
>> +	if (!(sizes & (1 << size)))
>> +		return -EINVAL;
>> +
>> +	if (old < 0)
>> +		return old;
>> +
>> +	/* Make sure the resource isn't assigned before making it larger. */
>> +	if (resource_size(res) < bytes && res->parent) {
>> +		release_resource(res);
>> +		res->end = resource_size(res) - 1;
>> +		res->start = 0;
>> +		if (resno < PCI_BRIDGE_RESOURCES)
>> +			pci_update_resource(dev, resno);
> Why do we need to write this zero to the BAR?  If PCI_COMMAND_MEMORY
> is set, I think this is dangerous, and if it's not set, I think it's
> unnecessary.
>
> I think we should set the IORESOURCE_UNSET bit to indicate that the
> resource does not have an address assigned to it.  It should get
> cleared later anyway, but having IORESOURCE_UNSET will make any debug
> messages emitted while reassigning resources make more sense.

Makes sense, changed.

>> +	return 0;
>> +
>> +error_resize:
>> +	pci_rbar_set_size(dev, resno, old);
>> +	res->end = res->start + (1ULL << (old + 20)) - 1;
>> +
>> +error_reassign:
>> +	pci_assign_unassigned_bus_resources(dev->bus);
>> +	pci_setup_bridge(dev->bus);
> Could this bridge-related recovery code go inside
> pci_reassign_bridge_resources()?

No, we need to restore the original size of the resource before trying 
the recovery code when something goes wrong.

I will address all other comments in the next version of the patch as well.

Regards,
Christian.

  reply	other threads:[~2017-04-11 15:37 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-13 12:41 Resizeable PCI BAR support V3 Christian König
2017-03-13 12:41 ` [PATCH 1/4] PCI: add resizeable BAR infrastructure v3 Christian König
2017-03-14 13:09   ` kbuild test robot
2017-03-24 15:28   ` Bjorn Helgaas
2017-03-13 12:41 ` [PATCH 2/4] PCI: add functionality for resizing resources v2 Christian König
2017-03-13 16:43   ` Andy Shevchenko
2017-04-11  9:14     ` Christian König
2017-03-14  9:01   ` kbuild test robot
2017-03-24 21:34   ` Bjorn Helgaas
2017-04-11 15:37     ` Christian König [this message]
2017-04-12 16:37       ` Bjorn Helgaas
2017-03-13 12:41 ` [PATCH 3/4] x86/PCI: Enable a 64bit BAR on AMD Family 15h (Models 30h-3fh) Processors Christian König
2017-03-13 16:49   ` Andy Shevchenko
2017-04-11  9:21     ` Christian König
2017-03-14  9:25   ` kbuild test robot
2017-03-24 15:47   ` Bjorn Helgaas
2017-04-11 15:48     ` Christian König
2017-04-12 16:55       ` Bjorn Helgaas
2017-04-25 13:01         ` Christian König
2017-05-17 21:36           ` Bjorn Helgaas
2017-03-13 12:41 ` [PATCH 4/4] drm/amdgpu: resize VRAM BAR for CPU access Christian König
2017-03-13 16:51   ` Andy Shevchenko
2017-03-15  7:23   ` Ayyappa Ch
2017-03-15  7:37     ` Christian König
2017-03-15  8:25       ` Zhou, David(ChunMing)
2017-03-15  9:29         ` Christian König
2017-03-16  2:19           ` Zhang, Jerry
2017-03-16  2:25             ` Alex Deucher
2017-03-16  2:41               ` Zhang, Jerry
2017-03-23 14:30                 ` Sagalovitch, Serguei
2017-03-23 15:56                   ` Christian König
2017-03-15 10:42       ` Ayyappa Ch
2017-03-15 11:03         ` Christian König
2017-03-15 16:08       ` Deucher, Alexander
2017-03-24 21:42   ` Bjorn Helgaas

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