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From: "Mi, Dapeng" <dapeng1.mi@linux.intel.com>
To: Sean Christopherson <seanjc@google.com>,
	Mingwei Zhang <mizhang@google.com>
Cc: Peter Zijlstra <peterz@infradead.org>,
	Ingo Molnar <mingo@redhat.com>,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	Namhyung Kim <namhyung@kernel.org>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Jiri Olsa <jolsa@kernel.org>, Ian Rogers <irogers@google.com>,
	Adrian Hunter <adrian.hunter@intel.com>,
	Liang@google.com, Kan <kan.liang@linux.intel.com>,
	"H. Peter Anvin" <hpa@zytor.com>,
	linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org,
	kvm@vger.kernel.org, linux-kselftest@vger.kernel.org,
	Yongwei Ma <yongwei.ma@intel.com>,
	Xiong Zhang <xiong.y.zhang@linux.intel.com>,
	Jim Mattson <jmattson@google.com>,
	Sandipan Das <sandipan.das@amd.com>,
	Zide Chen <zide.chen@intel.com>,
	Eranian Stephane <eranian@google.com>,
	Shukla Manali <Manali.Shukla@amd.com>,
	Nikunj Dadhania <nikunj.dadhania@amd.com>
Subject: Re: [PATCH v4 32/38] KVM: nVMX: Add nested virtualization support for mediated PMU
Date: Mon, 19 May 2025 13:24:43 +0800	[thread overview]
Message-ID: <71123914-ba9b-4ab0-b9c0-fa32fb53dfe2@linux.intel.com> (raw)
In-Reply-To: <aCc-q_udsn8o1vBT@google.com>


On 5/16/2025 9:33 PM, Sean Christopherson wrote:
> This shortlog is unnecessarily confusing.  It reads as if supported for running
> L2 in a vCPU with a mediated PMU is somehow lacking.
>
> On Mon, Mar 24, 2025, Mingwei Zhang wrote:
>> Add nested virtualization support for mediated PMU by combining the MSR
>> interception bitmaps of vmcs01 and vmcs12.
> Do not phrase changelogs related to nested virtualization in terms of enabling a
> _KVM_ feature.  KVM has no control over what hypervisor runs in L1.  It's a-ok to
> provide example use cases, but they need to be just that, examples.
>
>> Readers may argue even without this patch, nested virtualization works for
>> mediated PMU because L1 will see Perfmon v2 and will have to use legacy vPMU
>> implementation if it is Linux. However, any assumption made on L1 may be
>> invalid, e.g., L1 may not even be Linux.
>>
>> If both L0 and L1 pass through PMU MSRs, the correct behavior is to allow
>> MSR access from L2 directly touch HW MSRs, since both L0 and L1 passthrough
>> the access.
>>
>> However, in current implementation, if without adding anything for nested,
>> KVM always set MSR interception bits in vmcs02. This leads to the fact that
>> L0 will emulate all MSR read/writes for L2, leading to errors, since the
>> current mediated vPMU never implements set_msr() and get_msr() for any
>> counter access except counter accesses from the VMM side.
>>
>> So fix the issue by setting up the correct MSR interception for PMU MSRs.
> This is not a fix.  
>
>     KVM: nVMX: Disable PMU MSR interception as appropriate while running L2
>     
>     Merge KVM's PMU MSR interception bitmaps with those of L1, i.e. merge the
>     bitmaps of vmcs01 and vmcs12, e.g. so that KVM doesn't interpose on MSR
>     accesses unnecessarily if L1 exposes a mediated PMU (or equivalent) to L2.

Sure. Thanks.


>
>> Signed-off-by: Mingwei Zhang <mizhang@google.com>
>> Co-developed-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
>> Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
>> ---
>>  arch/x86/kvm/vmx/nested.c | 32 ++++++++++++++++++++++++++++++++
>>  1 file changed, 32 insertions(+)
>>
>> diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c
>> index cf557acf91f8..dbec40cb55bc 100644
>> --- a/arch/x86/kvm/vmx/nested.c
>> +++ b/arch/x86/kvm/vmx/nested.c
>> @@ -626,6 +626,36 @@ static inline void nested_vmx_set_intercept_for_msr(struct vcpu_vmx *vmx,
>>  #define nested_vmx_merge_msr_bitmaps_rw(msr) \
>>  	nested_vmx_merge_msr_bitmaps(msr, MSR_TYPE_RW)
>>  
>> +/*
>> + * Disable PMU MSRs interception for nested VM if L0 and L1 are
>> + * both mediated vPMU.
>> + */
> Again, KVM has no idea what is running in L1.  Drop this.

Yes. thanks.


>
>> +static void nested_vmx_merge_pmu_msr_bitmaps(struct kvm_vcpu *vcpu,
>> +					     unsigned long *msr_bitmap_l1,
>> +					     unsigned long *msr_bitmap_l0)
>> +{
>> +	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
>> +	struct vcpu_vmx *vmx = to_vmx(vcpu);
>> +	int i;
>> +
>> +	if (!kvm_mediated_pmu_enabled(vcpu))
> This is a worthwhile check, but a comment would be helpful:
>
> 	/*
> 	 * Skip the merges if the vCPU doesn't have a mediated PMU MSR, i.e. if
> 	 * none of the MSRs can possibly be passed through to L1.
> 	 */
> 	if (!kvm_vcpu_has_mediated_pmu(vcpu))
> 		return;

Sure. thanks.


>
>> +		return;
>> +
>> +	for (i = 0; i < pmu->nr_arch_gp_counters; i++) {
>> +		nested_vmx_merge_msr_bitmaps_rw(MSR_ARCH_PERFMON_EVENTSEL0 + i);
> This is unnecessary, KVM always intercepts event selectors.

Yes.


>
>> +		nested_vmx_merge_msr_bitmaps_rw(MSR_IA32_PERFCTR0 + i);
>> +		nested_vmx_merge_msr_bitmaps_rw(MSR_IA32_PMC0 + i);
>> +	}
>> +
>> +	for (i = 0; i < pmu->nr_arch_fixed_counters; i++)
>> +		nested_vmx_merge_msr_bitmaps_rw(MSR_CORE_PERF_FIXED_CTR0 + i);
>> +
>> +	nested_vmx_merge_msr_bitmaps_rw(MSR_CORE_PERF_FIXED_CTR_CTRL);
> Same thing here.

Yes.


>
>> +	nested_vmx_merge_msr_bitmaps_rw(MSR_CORE_PERF_GLOBAL_CTRL);
>> +	nested_vmx_merge_msr_bitmaps_read(MSR_CORE_PERF_GLOBAL_STATUS);
>> +	nested_vmx_merge_msr_bitmaps_write(MSR_CORE_PERF_GLOBAL_OVF_CTRL);
>> +}

  reply	other threads:[~2025-05-19  5:24 UTC|newest]

Thread overview: 128+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-24 17:30 [PATCH v4 00/38] Mediated vPMU 4.0 for x86 Mingwei Zhang
2025-03-24 17:30 ` [PATCH v4 01/38] perf: Support get/put mediated PMU interfaces Mingwei Zhang
2025-05-14 22:48   ` Sean Christopherson
2025-05-15  1:31     ` Mi, Dapeng
2025-03-24 17:30 ` [PATCH v4 02/38] perf: Skip pmu_ctx based on event_type Mingwei Zhang
2025-03-24 17:30 ` [PATCH v4 03/38] perf: Clean up perf ctx time Mingwei Zhang
2025-03-24 17:30 ` [PATCH v4 04/38] perf: Add a EVENT_GUEST flag Mingwei Zhang
2025-05-14 22:51   ` Sean Christopherson
2025-05-15  1:35     ` Mi, Dapeng
2025-05-19  6:58   ` Namhyung Kim
2025-05-20 16:09     ` Liang, Kan
2025-05-20 17:51       ` Namhyung Kim
2025-05-20 18:50         ` Liang, Kan
2025-05-21 19:46   ` Namhyung Kim
2025-03-24 17:30 ` [PATCH v4 05/38] perf: Add generic exclude_guest support Mingwei Zhang
2025-04-25 11:13   ` Peter Zijlstra
2025-05-14 23:19     ` Sean Christopherson
2025-05-15  1:37       ` Mi, Dapeng
2025-05-15 18:39       ` Liang, Kan
2025-05-15 19:25         ` Sean Christopherson
2025-05-15 20:18           ` Liang, Kan
2025-05-21 19:55   ` Namhyung Kim
2025-05-21 20:12     ` Liang, Kan
2025-03-24 17:30 ` [PATCH v4 06/38] x86/irq: Factor out common code for installing kvm irq handler Mingwei Zhang
2025-05-14 23:21   ` Sean Christopherson
2025-05-15  2:10     ` Mi, Dapeng
2025-03-24 17:30 ` [PATCH v4 07/38] perf: core/x86: Register a new vector for KVM GUEST PMI Mingwei Zhang
2025-05-14 23:24   ` Sean Christopherson
2025-05-15  1:40     ` Mi, Dapeng
2025-03-24 17:30 ` [PATCH v4 08/38] KVM: x86/pmu: Register KVM_GUEST_PMI_VECTOR handler Mingwei Zhang
2025-03-24 17:30 ` [PATCH v4 09/38] perf: Add switch_guest_ctx() interface Mingwei Zhang
2025-04-25 11:12   ` Peter Zijlstra
2025-05-14 23:30   ` Sean Christopherson
2025-05-15  1:45     ` Mi, Dapeng
2025-05-21 20:01   ` Namhyung Kim
2025-03-24 17:30 ` [PATCH v4 10/38] perf/x86: Support switch_guest_ctx interface Mingwei Zhang
2025-04-25 11:15   ` Peter Zijlstra
2025-04-25 13:06     ` Liang, Kan
2025-04-25 13:43       ` Peter Zijlstra
2025-04-25 13:56         ` Liang, Kan
2025-07-30  0:31           ` Sean Christopherson
2025-03-24 17:30 ` [PATCH v4 11/38] perf/x86: Forbid PMI handler when guest own PMU Mingwei Zhang
2025-05-15  0:00   ` Sean Christopherson
2025-05-15  1:52     ` Mi, Dapeng
2025-03-24 17:30 ` [PATCH v4 12/38] perf/x86/core: Do not set bit width for unavailable counters Mingwei Zhang
2025-03-24 17:30 ` [PATCH v4 13/38] perf/x86/core: Plumb mediated PMU capability from x86_pmu to x86_pmu_cap Mingwei Zhang
2025-03-24 17:30 ` [PATCH v4 14/38] KVM: x86/pmu: Introduce enable_mediated_pmu global parameter Mingwei Zhang
2025-05-15  0:09   ` Sean Christopherson
2025-05-15  2:53     ` Mi, Dapeng
2025-05-21 18:43       ` Sean Christopherson
2025-05-22  1:36         ` Mi, Dapeng
2025-03-24 17:30 ` [PATCH v4 15/38] KVM: x86/pmu: Check PMU cpuid configuration from user space Mingwei Zhang
2025-05-15  0:12   ` Sean Christopherson
2025-05-15  3:00     ` Mi, Dapeng
2025-03-24 17:30 ` [PATCH v4 16/38] KVM: x86: Rename vmx_vmentry/vmexit_ctrl() helpers Mingwei Zhang
2025-03-24 17:30 ` [PATCH v4 17/38] KVM: x86/pmu: Add perf_capabilities field in struct kvm_host_values{} Mingwei Zhang
2025-05-15  0:12   ` Sean Christopherson
2025-05-15  3:04     ` Mi, Dapeng
2025-03-24 17:30 ` [PATCH v4 18/38] KVM: x86/pmu: Move PMU_CAP_{FW_WRITES,LBR_FMT} into msr-index.h header Mingwei Zhang
2025-03-24 17:30 ` [PATCH v4 19/38] KVM: VMX: Add macros to wrap around {secondary,tertiary}_exec_controls_changebit() Mingwei Zhang
2025-03-24 17:31 ` [PATCH v4 20/38] KVM: x86/pmu: Check if mediated vPMU can intercept rdpmc Mingwei Zhang
2025-05-15  0:19   ` Sean Christopherson
2025-05-15  3:23     ` Mi, Dapeng
2025-05-26  6:15   ` Sandipan Das
2025-07-09 15:53     ` Sean Christopherson
2025-07-29  3:29       ` Mi, Dapeng
2025-07-30  0:38         ` Sean Christopherson
2025-07-30  2:25           ` Mi, Dapeng
2025-08-01 23:32             ` Sean Christopherson
2025-08-05  0:54               ` Sean Christopherson
2025-08-06  0:50                 ` Sean Christopherson
2025-03-24 17:31 ` [PATCH v4 21/38] KVM: x86/pmu/vmx: Save/load guest IA32_PERF_GLOBAL_CTRL with vm_exit/entry_ctrl Mingwei Zhang
2025-03-26 16:51   ` Chen, Zide
2025-03-26 20:09     ` Mingwei Zhang
2025-05-15  0:33       ` Sean Christopherson
2025-05-15  3:45         ` Mi, Dapeng
2025-03-24 17:31 ` [PATCH v4 22/38] KVM: x86/pmu: Optimize intel/amd_pmu_refresh() helpers Mingwei Zhang
2025-05-15  0:37   ` Sean Christopherson
2025-05-15  5:09     ` Mi, Dapeng
2025-05-15 19:22       ` Sean Christopherson
2025-05-16  1:03         ` Mi, Dapeng
2025-03-24 17:31 ` [PATCH v4 23/38] KVM: x86/pmu: Configure the interception of PMU MSRs Mingwei Zhang
2025-05-15  0:41   ` Sean Christopherson
2025-05-15  5:37     ` Mi, Dapeng
2025-05-15 19:06       ` Sean Christopherson
2025-05-16 13:34   ` Sean Christopherson
2025-05-19  5:18     ` Mi, Dapeng
2025-03-24 17:31 ` [PATCH v4 24/38] KVM: x86/pmu: Exclude PMU MSRs in vmx_get_passthrough_msr_slot() Mingwei Zhang
2025-05-16 13:35   ` Sean Christopherson
2025-05-16 14:45     ` Sean Christopherson
2025-05-19  5:21       ` Mi, Dapeng
2025-03-24 17:31 ` [PATCH v4 25/38] KVM: x86/pmu: Add AMD PMU registers to direct access list Mingwei Zhang
2025-05-16 13:36   ` Sean Christopherson
2025-03-24 17:31 ` [PATCH v4 26/38] KVM: x86/pmu: Introduce eventsel_hw to prepare for pmu event filtering Mingwei Zhang
2025-05-15  0:42   ` Sean Christopherson
2025-05-15  5:34     ` Mi, Dapeng
2025-03-24 17:31 ` [PATCH v4 27/38] KVM: x86/pmu: Handle PMU MSRs interception and " Mingwei Zhang
2025-05-15  0:43   ` Sean Christopherson
2025-05-15  5:38     ` Mi, Dapeng
2025-05-16  1:26   ` Mi, Dapeng
2025-05-16 20:54     ` Sean Christopherson
2025-05-19  4:16       ` Mi, Dapeng
2025-03-24 17:31 ` [PATCH v4 28/38] KVM: x86/pmu/svm: Set GuestOnly bit and clear HostOnly bit when guest writes to event selectors Mingwei Zhang
2025-03-24 17:31 ` [PATCH v4 29/38] KVM: x86/pmu: Switch host/guest PMU context at vm-exit/vm-entry Mingwei Zhang
2025-05-15 16:29   ` Sean Christopherson
2025-05-16  2:37     ` Mi, Dapeng
2025-05-16 13:26   ` Sean Christopherson
2025-05-19  5:07     ` Mi, Dapeng
2025-03-24 17:31 ` [PATCH v4 30/38] KVM: x86/pmu: Handle emulated instruction for mediated vPMU Mingwei Zhang
2025-05-16  1:10   ` Sean Christopherson
2025-03-24 17:31 ` [PATCH v4 31/38] KVM: nVMX: Add macros to simplify nested MSR interception setting Mingwei Zhang
2025-03-24 17:31 ` [PATCH v4 32/38] KVM: nVMX: Add nested virtualization support for mediated PMU Mingwei Zhang
2025-05-16 13:33   ` Sean Christopherson
2025-05-19  5:24     ` Mi, Dapeng [this message]
2025-03-24 17:31 ` [PATCH v4 33/38] perf/x86/intel: Support PERF_PMU_CAP_MEDIATED_VPMU Mingwei Zhang
2025-03-24 17:31 ` [PATCH v4 34/38] perf/x86/amd: Support PERF_PMU_CAP_MEDIATED_VPMU for AMD host Mingwei Zhang
2025-05-21 20:00   ` Namhyung Kim
2025-03-24 17:31 ` [PATCH v4 35/38] KVM: x86/pmu: Expose enable_mediated_pmu parameter to user space Mingwei Zhang
2025-03-24 17:31 ` [PATCH v4 36/38] KVM: selftests: Add mediated vPMU supported for pmu tests Mingwei Zhang
2025-03-24 17:31 ` [PATCH v4 37/38] KVM: Selftests: Support mediated vPMU for vmx_pmu_caps_test Mingwei Zhang
2025-03-24 17:31 ` [PATCH v4 38/38] KVM: Selftests: Fix pmu_counters_test error for mediated vPMU Mingwei Zhang
2025-04-16  7:22 ` [PATCH v4 00/38] Mediated vPMU 4.0 for x86 Mi, Dapeng
2025-04-25 12:27   ` Peter Zijlstra
2025-05-06  9:57 ` Mi, Dapeng
2025-05-06 19:45   ` Sean Christopherson
2025-05-07  0:46     ` Mi, Dapeng
2025-05-15  0:49 ` Sean Christopherson
2025-05-15  5:45   ` Mi, Dapeng

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