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Thu, 09 Jul 2026 05:00:59 -0700 (PDT) X-Received: by 2002:a05:620a:8813:b0:92b:55d5:ba3 with SMTP id af79cd13be357-92ed764b013mr297572385a.0.1783598458706; Thu, 09 Jul 2026 05:00:58 -0700 (PDT) Received: from [192.168.120.193] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c15bb94c782sm381852466b.40.2026.07.09.05.00.55 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 09 Jul 2026 05:00:57 -0700 (PDT) Message-ID: <71576059-b5cd-401e-b4b0-c1784f24ba46@oss.qualcomm.com> Date: Thu, 9 Jul 2026 14:00:54 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 4/4] arm64: dts: qcom: shikra: Add support for AudioCoreCC and AudioCoreCSR nodes To: Imran Shaik , Bjorn Andersson , Michael Turquette , Stephen Boyd , Brian Masney , Philipp Zabel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio Cc: Ajit Pandey , Taniya Das , Jagadeesh Kona , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org References: <20260708-shikra-audiocorecc-v2-0-b320d822cdd0@oss.qualcomm.com> <20260708-shikra-audiocorecc-v2-4-b320d822cdd0@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20260708-shikra-audiocorecc-v2-4-b320d822cdd0@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Info: AW1haW4tMjYwNzA5MDExNSBTYWx0ZWRfX5GMoUa6EBejT Ip4CxmJdprjzpH626H44YaDlCFJu0jW8hYw7TSGJMH725HvyRqao1dal7a8Nsdvqq8rOk2GllL7 Pku71MEGXuBu2ZpsUwZStZhlTdW+AuU= X-Proofpoint-ORIG-GUID: xSxz1wo6tpCZaiOCV_eBD2sIA3teByUg X-Authority-Analysis: v=2.4 cv=cOLQdFeN c=1 sm=1 tr=0 ts=6a4f8d7c cx=c_pps a=hnmNkyzTK/kJ09Xio7VxxA==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=EUspDBNiAAAA:8 a=tlOuMNSg9W14aln77gIA:9 a=QEXdDO2ut3YA:10 a=PEH46H7Ffwr30OY-TuGO:22 X-Proofpoint-GUID: xSxz1wo6tpCZaiOCV_eBD2sIA3teByUg X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzA5MDExNSBTYWx0ZWRfX0mKT3h0J9cE1 V++aFiXE3vubjDnrmdSN9cH30idcwBLJUw19HwxxdV6lVHDsCZMzPlMDzUbqiYZ9auaCv3n3CVW sv5bcB6aH/yUcYtZRyki+WToeXTy8SsKaws1wh1JSZbnVjjFBia3jV07tgrJ07oKpOZvTU2yOqL IYzVswrPmAxgdZfsYz9oyS+AcutjYvIm849WB+7FgQq4joaOjz4OWo2QGJrDN7uYKiQjCtDYD6A 2nLJgCFCDvh3qmNPrYhp5ltFl1LSWWBI4vSdt+m85MCE4YzITEG5z6pKK03OH7EObvTM//ugMRP MhBYYzU3CSgQaudCXtX3R1zFBXEZgk5pwXid7Moz8CGfAn6IxQ3nf6Lrj8mfzi7wLS+wPYYIZPD wOfC15mI0yl9oBjrdXiiBXDjYpZ/dRMekna07UvcKLhOwOccFoK/oxmxMRxV9/kOmfnOMICb2GP FCOw8s1VLCt0+IcqEqA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-09_02,2026-07-09_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 clxscore=1015 priorityscore=1501 bulkscore=0 spamscore=0 lowpriorityscore=0 phishscore=0 suspectscore=0 impostorscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607090115 On 7/8/26 8:25 PM, Imran Shaik wrote: > Add support for Audio Core Clock Controller (AudioCoreCC) and Audio Core > CSR nodes on Qualcomm Shikra SoC. The Audio Core Clocks and Resets support > differs across Shikra variants based on Audio subsystem enablement as > follows: > - CQM variant: The QAIF driver runs on HLOS, hence both clocks and resets > are required to be supported on HLOS. > - CQS variant: The QAIF driver runs on the Modem, and required clocks are > handled on Modem, so from HLOS only resets are needed. > - IQS variant: no soundwire codes, hence no clocks/resets are needed. > > Signed-off-by: Imran Shaik > --- For the sake of simplification, can the resets be enabled globally by default? Konrad