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([2a02:6b6a:b4d7:0:ebf7:de38:f6bc:8fe8]) by smtp.gmail.com with ESMTPSA id l21-20020a05600c4f1500b003b4fdbb6319sm13186914wmq.21.2022.11.07.10.08.46 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 07 Nov 2022 10:08:46 -0800 (PST) Message-ID: <71a41442-b1eb-d02e-53fe-c35dbcfc8416@bytedance.com> Date: Mon, 7 Nov 2022 18:08:45 +0000 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0 Subject: Re: [v2 2/6] KVM: arm64: Add SMCCC paravirtualised lock calls Content-Language: en-US To: Punit Agrawal Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, linux-doc@vger.kernel.org, virtualization@lists.linux-foundation.org, linux@armlinux.org.uk, yezengruan@huawei.com, catalin.marinas@arm.com, will@kernel.org, maz@kernel.org, steven.price@arm.com, mark.rutland@arm.com, bagasdotme@gmail.com, fam.zheng@bytedance.com, liangma@liangbit.com References: <20221104062105.4119003-1-usama.arif@bytedance.com> <20221104062105.4119003-3-usama.arif@bytedance.com> <87cz9y3avq.fsf@stealth> From: Usama Arif In-Reply-To: <87cz9y3avq.fsf@stealth> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 07/11/2022 17:58, Punit Agrawal wrote: > Usama Arif writes: > >> Add a new SMCCC compatible hypercalls for PV lock features: >> ARM_SMCCC_KVM_FUNC_PV_LOCK: 0xC6000002 >> >> Also add the header file which defines the ABI for the paravirtualized >> lock features we're about to add. >> >> Signed-off-by: Zengruan Ye >> Signed-off-by: Usama Arif >> --- >> arch/arm64/include/asm/pvlock-abi.h | 17 +++++++++++++++++ >> include/linux/arm-smccc.h | 8 ++++++++ >> tools/include/linux/arm-smccc.h | 8 ++++++++ >> 3 files changed, 33 insertions(+) >> create mode 100644 arch/arm64/include/asm/pvlock-abi.h >> >> diff --git a/arch/arm64/include/asm/pvlock-abi.h b/arch/arm64/include/asm/pvlock-abi.h >> new file mode 100644 >> index 000000000000..3f4574071679 >> --- /dev/null >> +++ b/arch/arm64/include/asm/pvlock-abi.h >> @@ -0,0 +1,17 @@ >> +/* SPDX-License-Identifier: GPL-2.0 */ >> +/* >> + * Copyright(c) 2019 Huawei Technologies Co., Ltd >> + * Author: Zengruan Ye >> + * Usama Arif >> + */ >> + >> +#ifndef __ASM_PVLOCK_ABI_H >> +#define __ASM_PVLOCK_ABI_H >> + >> +struct pvlock_vcpu_state { >> + __le64 preempted; >> + /* Structure must be 64 byte aligned, pad to that size */ >> + u8 padding[56]; >> +} __packed; > > For structure alignment, I'd have expected to see the use of "aligned" > attribute. Is there any benefit in using padding to achieve alignment? > Just made it consistent with pvclock-abi.h. If its more appropriate, can change to aligned in next patchset: diff --git a/arch/arm64/include/asm/pvlock-abi.h b/arch/arm64/include/asm/pvlock-abi.h index 3f4574071679..bacec4cb927a 100644 --- a/arch/arm64/include/asm/pvlock-abi.h +++ b/arch/arm64/include/asm/pvlock-abi.h @@ -11,7 +11,6 @@ struct pvlock_vcpu_state { __le64 preempted; /* Structure must be 64 byte aligned, pad to that size */ - u8 padding[56]; -} __packed; +} __attribute__((aligned(64))); > [...]