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Fri, 21 Aug 2026 03:49:38 -0700 (PDT) X-Received: by 2002:a05:6a20:9145:b0:3c4:46ca:334b with SMTP id adf61e73a8af0-3cd3076a57amr8239919637.9.1787309378213; Fri, 21 Aug 2026 03:49:38 -0700 (PDT) Received: from [10.218.50.86] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-cc1657e1f98sm1714195a12.11.2026.08.21.03.49.35 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 21 Aug 2026 03:49:37 -0700 (PDT) Message-ID: <720c8c7f-532c-41e2-a4b4-60ab0edbb280@oss.qualcomm.com> Date: Fri, 21 Aug 2026 16:19:33 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 2/2] spi: qcom-geni: Add panic notifier to cancel and reset DMA during panic To: Praveen Talari , konrad.dybcio@oss.qualcomm.com, Mark Brown Cc: mukesh.savaliya@oss.qualcomm.com, linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, chandana.chiluveru@oss.qualcomm.com References: <20260818-add-shutdown-and-panic-notifier-for-spi-v3-0-8b62c4bc2d21@oss.qualcomm.com> <20260818-add-shutdown-and-panic-notifier-for-spi-v3-2-8b62c4bc2d21@oss.qualcomm.com> Content-Language: en-US From: Jyothi Kumar Seerapu In-Reply-To: <20260818-add-shutdown-and-panic-notifier-for-spi-v3-2-8b62c4bc2d21@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODIxMDA4MSBTYWx0ZWRfX4VEGaQH3fISu Va/KMyN0LummeNVB+Hc6a7LCNogxDsxq7f1JGcXKtHdpZrgR/IwFnXJr1vZnZNBlLlKfjkpAVmp qE3YkUj6H71dOdzzwqxG4PvybVIkOT+6N1JX5ZuBIrbo1TLyWXTVc7FciJM9128eVRUCF+LtuZ7 7j25WSazu1UoiDJaZyNf6UD+vyL2Pzxmv6urwcolI+nSqdpgVT2FMI2rdM+Vo8TDtTpH2XW7W42 onMxapyH7kdkAztgAjg4lk9SOmWa2US6w7O4bkzy4MpYqP4C05F9SJf7J2X3BRfCep+TT7E2WUd GcAvTKOfuAg1CiQOZ4U3ogZOsS19GRNGnro4OnheXN1WASlR4W44oaurkYVi/hLgaPGIbKXucCT gCNiXQ7USxl4KNKjfpH9LqHvdu6jAwkzk5lUQwOOb+/WXhMj/r/RMEwMu7KD1wwe1PKW2vumzA2 n36GlR4bFe0i7X79l/Q== X-Proofpoint-Spam-Info: AW1haW4tMjYwODIxMDA4MSBTYWx0ZWRfX+CSLIneM0A+i SYSUbJejBv65kWQu7akj5aBCO6vWAXBKWBUt9lXMhRZYfcL8hKW68f0rFJyRxN/otOa8Rf7nhR+ TDG9eBj2q5AQIhmXJuLzL46PeSy6YxU= X-Proofpoint-ORIG-GUID: AcAY0VjcyRnTcdSC7xWbt5Kwp4SxIr_A X-Authority-Analysis: v=2.4 cv=BJyDalQG c=1 sm=1 tr=0 ts=6a882d43 cx=c_pps a=Qgeoaf8Lrialg5Z894R3/Q==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=EUspDBNiAAAA:8 a=_wxJVZpf7Xh69hwLhBsA:9 a=QEXdDO2ut3YA:10 a=x9snwWr2DeNwDh03kgHS:22 X-Proofpoint-GUID: AcAY0VjcyRnTcdSC7xWbt5Kwp4SxIr_A X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-21_03,2026-08-21_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 malwarescore=0 bulkscore=0 clxscore=1015 impostorscore=0 adultscore=0 phishscore=0 priorityscore=1501 suspectscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608210081 On 8/18/2026 6:58 PM, Praveen Talari wrote: > When a VM crashes with an active SPI DMA transfer in progress, the > SMMU raises context faults as the DMA engine continues to access > IOVAs that are invalidated when the VM's memory context is torn down. > These faults can affect other VMs sharing the same SMMU instance and > obscure the root cause of the crash. > > Register a panic notifier that cancels (or aborts, if cancel doesn't > complete) the in-flight command and resets the TX/RX DMA FSMs, so the > DMA engine stops issuing transactions against invalidated IOVAs > before the system halts. For GPI DMA mode, the DMA channels are > terminated directly via dmaengine_terminate_async(). > > The notifier bails out early if the device is not runtime-active or > if there's no active GENI command, avoiding unnecessary register > accesses while the SE is clock-gated or idle. > > Since panic notifiers run with IRQs and preemption disabled, > completion-based waits used by the regular error-handling path > (handle_se_timeout()) cannot be reused here. Instead, the relevant > status registers are polled directly with > readl_poll_timeout_atomic(), which is safe to call in this context. > > Signed-off-by: Praveen Talari > --- > drivers/spi/spi-geni-qcom.c | 68 +++++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 68 insertions(+) > > diff --git a/drivers/spi/spi-geni-qcom.c b/drivers/spi/spi-geni-qcom.c > index c65c1788325d..f272bd0cb640 100644 > --- a/drivers/spi/spi-geni-qcom.c > +++ b/drivers/spi/spi-geni-qcom.c > @@ -12,8 +12,10 @@ > #include > #include > #include > +#include > #include > #include > +#include > #include > #include > #include > @@ -115,6 +117,7 @@ struct spi_geni_master { > struct dma_chan *rx; > int cur_xfer_mode; > const struct geni_spi_desc *dev_data; > + struct notifier_block panic_nb; > }; > > static void spi_slv_setup(struct spi_geni_master *mas) > @@ -1073,6 +1076,62 @@ static void spi_geni_shutdown(struct platform_device *pdev) > spi_controller_suspend(spi); > } > > +static int spi_geni_panic_notifier(struct notifier_block *nb, > + unsigned long action, void *data) > +{ > + struct spi_geni_master *mas = container_of(nb, struct spi_geni_master, panic_nb); > + struct spi_controller *spi = dev_get_drvdata(mas->dev); > + struct geni_se *se = &mas->se; > + u32 val; > + > + if (!pm_runtime_active(mas->dev)) > + return NOTIFY_OK; > + > + if (mas->cur_xfer_mode == GENI_GPI_DMA) { > + dmaengine_terminate_async(mas->tx); > + dmaengine_terminate_async(mas->rx); > + return NOTIFY_OK; > + } > + > + if (!(readl_relaxed(se->base + SE_GENI_STATUS) & M_GENI_CMD_ACTIVE)) > + return NOTIFY_OK; > + > + if (!spi->target) { > + geni_se_cancel_m_cmd(se); > + if (!readl_poll_timeout_atomic(se->base + SE_GENI_M_IRQ_STATUS, val, > + val & M_CMD_CANCEL_EN, 10, 50000)) { > + writel_relaxed(M_CMD_CANCEL_EN, se->base + SE_GENI_M_IRQ_CLEAR); > + return NOTIFY_OK; Looks like a successful cancel here returns NOTIFY_OK directly, skipping the FSM reset block below it entirely. Is that the correct expectation ?> + } > + } > + > + geni_se_abort_m_cmd(se); > + if (!readl_poll_timeout_atomic(se->base + SE_GENI_M_IRQ_STATUS, val, > + val & M_CMD_ABORT_EN, 10, 50000)) > + writel_relaxed(M_CMD_ABORT_EN, se->base + SE_GENI_M_IRQ_CLEAR); > + > + if (mas->cur_xfer_mode == GENI_SE_DMA) { > + writel_relaxed(1, se->base + SE_DMA_TX_FSM_RST); > + readl_poll_timeout_atomic(se->base + SE_DMA_TX_IRQ_STAT, val, > + val & TX_RESET_DONE, 10, 50000); > + writel_relaxed(val, se->base + SE_DMA_TX_IRQ_CLR); > + > + writel_relaxed(1, se->base + SE_DMA_RX_FSM_RST); > + readl_poll_timeout_atomic(se->base + SE_DMA_RX_IRQ_STAT, val, > + val & RX_RESET_DONE, 10, 50000); > + writel_relaxed(val, se->base + SE_DMA_RX_IRQ_CLR); > + } > + > + return NOTIFY_OK; > +} > + > +static void spi_geni_unregister_notifiers(void *data) > +{ > + struct spi_geni_master *mas = data; > + > + atomic_notifier_chain_unregister(&panic_notifier_list, &mas->panic_nb); > +} > + > static int spi_geni_probe(struct platform_device *pdev) > { > int ret, irq; > @@ -1161,6 +1220,15 @@ static int spi_geni_probe(struct platform_device *pdev) > if (ret) > return ret; > > + mas->panic_nb.notifier_call = spi_geni_panic_notifier; > + ret = atomic_notifier_chain_register(&panic_notifier_list, &mas->panic_nb); > + if (ret) > + return ret; > + > + ret = devm_add_action_or_reset(dev, spi_geni_unregister_notifiers, mas); > + if (ret) > + return ret; > + > return devm_spi_register_controller(dev, spi); > } > >