From: Nihal Kumar Gupta <nihal.gupta@oss.qualcomm.com>
To: Anusha Arun Nandi <anusha.nandi@oss.qualcomm.com>,
Bryan O'Donoghue <bod@kernel.org>
Cc: Vinod Koul <vkoul@kernel.org>,
Neil Armstrong <neil.armstrong@linaro.org>,
Manivannan Sadhasivam <mani@kernel.org>,
gjorgji.rosikopulos@oss.qualcomm.com,
hariram.purushothaman@oss.qualcomm.com, akapatra@quicinc.com,
jigarkumar.zala@oss.qualcomm.com, linux-phy@lists.infradead.org,
linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org,
Vikram Sharma <vikram.sharma@oss.qualcomm.com>,
Suresh Vankadara <svankada@qti.qualcomm.com>
Subject: Re: [PATCH v2 1/3] arm64: dts: qcom: lemans: add CSI2 D-PHY common-phy providers
Date: Wed, 4 Nov 2026 10:23:30 +0530 [thread overview]
Message-ID: <72223121-cb42-422f-8ce5-4cf9f41c5aec@oss.qualcomm.com> (raw)
In-Reply-To: <20261103221026.3662383-2-anusha.nandi@oss.qualcomm.com>
On 04-11-2026 03:40, Anusha Arun Nandi wrote:
> Expose the four SA8775p CSIPHYs as standalone qcom,sa8775p-csi2-phy
> generic-PHY provider nodes (csiphy0..3) at their existing register
> addresses, each with its own OF graph (port@0 sensor-facing, port@1
> CAMSS-facing) so camss_detect_legacy_phy() picks the non-legacy path
> once a board wires a sensor through one of them. The camss node's own
> reg-names/clocks/interrupts for the CSIPHYs are unchanged, so boards
> that don't use a provider still get the legacy binding.
>
> The provider nodes are disabled by default; a board or camera overlay
> enables the one(s) it uses.
>
> Reviewed-by: Jigarkumar Zala <jigarkumar.zala@oss.qualcomm.com>
> Signed-off-by: Anusha Arun Nandi <anusha.nandi@oss.qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/lemans.dtsi | 140 +++++++++++++++++++++++++++
> 1 file changed, 140 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi
> index 1fdb72fa5518..2a30bf1c82af 100644
> --- a/arch/arm64/boot/dts/qcom/lemans.dtsi
> +++ b/arch/arm64/boot/dts/qcom/lemans.dtsi
> @@ -5164,6 +5164,146 @@ cci3_i2c1: i2c-bus@1 {
> };
> };
>
> + csiphy0: phy@ac9c000 {
> + compatible = "qcom,sa8775p-csi2-phy";
> + reg = <0x0 0x0ac9c000 0x0 0x2000>;
...
> + csiphy3: phy@aca2000 {
> + compatible = "qcom,sa8775p-csi2-phy";
phy@ac9c000 through phy@aca2000 nodes precede the existing
isp@ac78000 node.
Sort CSIPHY nodes by unit-address numerically.
> + reg = <0x0 0x0aca2000 0x0 0x2000>;
> +
> + clocks = <&camcc CAM_CC_CSIPHY3_CLK>,
> + <&camcc CAM_CC_CSI3PHYTIMER_CLK>;
> + clock-names = "core",
> + "timer";
> +
> + interrupts = <GIC_SPI 448 IRQ_TYPE_EDGE_RISING>;
> +
> + operating-points-v2 = <&csiphy_opp_table>;
> +
> + power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>;
> + power-domain-names = "top";
> +
> + status = "disabled";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + };
> +
> + port@1 {
> + reg = <1>;
> + };
> + };
> + };
> +
> + csiphy_opp_table: opp-table-csiphy {
> + compatible = "operating-points-v2";
> +
> + opp-300000000 {
> + opp-hz = /bits/ 64 <300000000>;
> + };
> +
> + opp-400000000 {
> + opp-hz = /bits/ 64 <400000000>;
> + };
> + };
> +
> camss: isp@ac78000 {
> compatible = "qcom,sa8775p-camss";
>
--
Regards,
Nihal Kumar Gupta
next prev parent reply other threads:[~2026-11-04 4:53 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-03 22:10 [PATCH v2 0/3] arm64: dts: qcom: Add CSI2 PHY common-phy providers for SA8775P, QCS8300 and SC7280 Anusha Arun Nandi
2026-11-03 22:10 ` [PATCH v2 1/3] arm64: dts: qcom: lemans: add CSI2 D-PHY common-phy providers Anusha Arun Nandi
2026-11-04 4:53 ` Nihal Kumar Gupta [this message]
2026-11-03 22:10 ` [PATCH v2 2/3] arm64: dts: qcom: monaco: add CSI2 PHY " Anusha Arun Nandi
2026-11-03 22:10 ` [PATCH v2 3/3] arm64: dts: qcom: kodiak: add CSI2 D-PHY " Anusha Arun Nandi
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