From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753618AbcDAJax (ORCPT ); Fri, 1 Apr 2016 05:30:53 -0400 Received: from mga14.intel.com ([192.55.52.115]:29385 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751432AbcDAJav convert rfc822-to-8bit (ORCPT ); Fri, 1 Apr 2016 05:30:51 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,426,1455004800"; d="scan'208";a="936138394" Content-Type: text/plain; charset=utf-8 Mime-Version: 1.0 (Mac OS X Mail 9.3 \(3124\)) Subject: Re: [PATCH] x86: Calculate MHz using APERF/MPERF for cpuinfo and scaling_cur_freq From: Stephane Gasparini In-Reply-To: <20160401082923.GH11035@twins.programming.kicks-ass.net> Date: Fri, 1 Apr 2016 11:30:48 +0200 Cc: Len Brown , x86@kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Len Brown Content-Transfer-Encoding: 8BIT Message-Id: <7239BF36-2C27-4325-A5B8-01BC4CA58B4C@linux.intel.com> References: <6e0c25e64e0fb65a42dfc63ad5f660302e07cd87.1459485198.git.len.brown@intel.com> <52f711be59539723358bea1aa3c368910a68b46d.1459485198.git.len.brown@intel.com> <20160401080328.GC3448@twins.programming.kicks-ass.net> <9222CD56-C603-449C-A049-E518DAFA6883@linux.intel.com> <20160401082323.GE3448@twins.programming.kicks-ass.net> <20160401082923.GH11035@twins.programming.kicks-ass.net> To: Peter Zijlstra X-Mailer: Apple Mail (2.3124) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org my comment was about your comment that MSR have wrapped however many times > On Apr 1, 2016, at 10:03 AM, Peter Zijlstra wrote: > > That is; if userspace doesn't request a freq reading we can go without > reading this for a very long time. > >> + >> + rdmsrl(MSR_IA32_APERF, aperf); >> + rdmsrl(MSR_IA32_MPERF, mperf); >> + >> + aperf_delta = aperf - s->aperf; >> + mperf_delta = mperf - s->mperf; > > That means these delta's can be arbitrarily large, in fact the MSRs can > have wrapped however many times. The MSRs will not wrap that often. — Steph > On Apr 1, 2016, at 10:29 AM, Peter Zijlstra wrote: > > On Fri, Apr 01, 2016 at 10:23:23AM +0200, Peter Zijlstra wrote: >> >> Trim your emails >> >> On Fri, Apr 01, 2016 at 10:16:42AM +0200, Stephane Gasparini wrote: >> >>>> That means these delta's can be arbitrarily large, in fact the MSRs can >>>> have wrapped however many times. >>> >>> 64 bits is 18 446 744 073 709 551 615 >>> >>> so even assuming a 10 GHz frequency if my math are good this is more than >>> 58 years before the MSR wrap around, assuming the device ran always at max >>> freq. >> >> fair enough.. but going with 10Ghz, cpu_khz would be 10e6 ~ 33 bits, > > I can't do maths this morning; 23 bits > >> which effectively reduces the wrap/overflow time to just 31 bits, which >> per that frequency is just ~1/4th of a second. > > 41 giving lots more, but a reasonable time to wrap/overflow. > -- > To unsubscribe from this list: send the line "unsubscribe linux-pm" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html