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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-33b61b11ca9sm15658229a91.24.2025.10.14.04.25.46 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 14 Oct 2025 04:25:52 -0700 (PDT) Message-ID: <7277bc17-112b-4fc9-9099-243d216893d8@oss.qualcomm.com> Date: Tue, 14 Oct 2025 19:25:45 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 3/3] arm64: dts: qcom: Enable DisplayPort on QCS615 Ride platform To: Dmitry Baryshkov Cc: Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, fange.zhang@oss.qualcomm.com, yongxing.mou@oss.qualcomm.com, li.liu@oss.qualcomm.com References: <20251014-add-displayport-support-to-qcs615-devicetree-v2-0-1209df74d410@oss.qualcomm.com> <20251014-add-displayport-support-to-qcs615-devicetree-v2-3-1209df74d410@oss.qualcomm.com> From: Xiangxu Yin In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: it5wRZNfPyJDq7IoQjCTazcyEtoSLjSE X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDExMDAxOCBTYWx0ZWRfX+xIm6gCBxCfB ckzjw47StAJfyvgzxdtXoa/wWbIz1S55NgbFj0DIJWSP/2Y6ATIE00ghl3Ec4qyRKrsPbQFopsI Ag6lZ51ixTFfAIpmiIwJwqnYbf4hJKFPG1GXTxKh02BzXh6Xm518Jy/H8NDi+TP7sn0hExHTRbI HxFfrwgt7vpbFrvmjh7v75dXRboJyPU1EXugTUUObNoBWu3EKxUHwA+58FnwioMbkJt9otP6ijp ecq41A6DKNsspz4F0CMrDCPzkvLHAjLpYMGB3xaSUSAPeZpMgnzUC85St4NFcuOYjYTSmoYwUVr LXfuHd3hUBSQZd7cxMBxNu9kXuskCGeMbSoh15Wj3UouV18yUk6D7pbSYD9vFfMRP3et9v3RhIE zbcXhA4ODk8YeQ7zt4V5dR9tFXX4fA== X-Proofpoint-GUID: it5wRZNfPyJDq7IoQjCTazcyEtoSLjSE X-Authority-Analysis: v=2.4 cv=PdTyRyhd c=1 sm=1 tr=0 ts=68ee3342 cx=c_pps a=RP+M6JBNLl+fLTcSJhASfg==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=x6icFKpwvdMA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=lUa4T_ycwPSD0wKDvOsA:9 a=QEXdDO2ut3YA:10 a=iS9zxrgQBfv6-_F4QbHw:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-10-14_02,2025-10-13_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 phishscore=0 bulkscore=0 clxscore=1015 adultscore=0 lowpriorityscore=0 impostorscore=0 priorityscore=1501 spamscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2510020000 definitions=main-2510110018 On 10/14/2025 6:21 PM, Dmitry Baryshkov wrote: > On Tue, Oct 14, 2025 at 05:42:12PM +0800, Xiangxu Yin via B4 Relay wrote: >> From: Xiangxu Yin >> >> Add DP connector node and configure MDSS DisplayPort controller for >> QCS615 Ride platform. Include lane mapping and PHY supply settings >> to support DP output. >> >> Signed-off-by: Xiangxu Yin >> --- >> arch/arm64/boot/dts/qcom/qcs615-ride.dts | 31 +++++++++++++++++++++++++++++++ >> 1 file changed, 31 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/qcs615-ride.dts b/arch/arm64/boot/dts/qcom/qcs615-ride.dts >> index 9ac1dd3483b56f9d1652f8a38f62d759efa92b6a..0b8bcabdd90a0820b1f9c85e43b78e40eb8a9a38 100644 >> --- a/arch/arm64/boot/dts/qcom/qcs615-ride.dts >> +++ b/arch/arm64/boot/dts/qcom/qcs615-ride.dts >> @@ -39,6 +39,20 @@ xo_board_clk: xo-board-clk { >> }; >> }; >> >> + dp0-connector { >> + compatible = "dp-connector"; >> + label = "DP0"; >> + type = "mini"; >> + >> + hpd-gpios = <&io_expander 8 GPIO_ACTIVE_HIGH>; > Not the gpio102/ 103 / 104? Interesting. Yes, on this platform the DP HPD signal is controlled by the pin controller on the video-out sub-board, not by the TLMM on the SoC. >> + >> + port { >> + dp0_connector_in: endpoint { >> + remote-endpoint = <&mdss_dp0_out>; >> + }; >> + }; >> + }; >> + >> dp-dsi0-connector { >> compatible = "dp-connector"; >> label = "DSI0"; >> @@ -423,6 +437,16 @@ &mdss { >> status = "okay"; >> }; >> >> +&mdss_dp0 { >> + status = "okay"; >> +}; >> + >> +&mdss_dp0_out { >> + data-lanes = <3 2 0 1>; > It's not a board peculiarity. All QCS615 / SM6150 devices are affected > by this twist. Please move this to the SoC DT file. Ok. >> + link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000>; >> + remote-endpoint = <&dp0_connector_in>; >> +}; >> + >> &mdss_dsi0 { >> vdda-supply = <&vreg_l11a>; >> status = "okay"; >> @@ -623,6 +647,13 @@ &usb_qmpphy { >> status = "okay"; >> }; >> >> +&usb_qmpphy_2 { >> + vdda-phy-supply = <&vreg_l5a>; >> + vdda-pll-supply = <&vreg_l12a>; >> + >> + status = "okay"; >> +}; >> + >> &usb_1 { >> status = "okay"; >> }; >> >> -- >> 2.34.1 >> >>