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Thu, 08 Oct 2026 14:50:22 -0700 (PDT) Message-ID: <728a8ff2bea09d6e35446bb13ac663f2c3a63ea8.camel@redhat.com> Subject: Re: [PATCH] drm/nouveau: Skip the Turing CE workaround object for non-GR channels From: lyude@redhat.com To: Mary Guillemard , Danilo Krummrich , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: dri-devel@lists.freedesktop.org, nouveau@lists.freedesktop.org, linux-kernel@vger.kernel.org Date: Thu, 08 Oct 2026 17:50:22 -0400 In-Reply-To: <20261007-turing-async-ce-fix-v1-1-12ee6ccd1a3c@mary.zone> References: <20261007-turing-async-ce-fix-v1-1-12ee6ccd1a3c@mary.zone> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.58.3 (3.58.3-2.fc43) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Reviewed-by: Lyude Paul Will push to drm-misc-fixes in just a moment On Wed, 2026-10-07 at 16:30 +0200, Mary Guillemard wrote: > This workaround is here for the old Gallium driver and predate async > CE > and NVDEC.=C2=A0 Instead of only skipping it for NVDEC, let's only apply > it > in case of GR channels. >=20 > This should make async CE work properly on Turing by stopping the > assign > of a GRCE. (here CE0) >=20 > Signed-off-by: Mary Guillemard > --- > =C2=A0drivers/gpu/drm/nouveau/nouveau_abi16.c | 2 +- > =C2=A01 file changed, 1 insertion(+), 1 deletion(-) >=20 > diff --git a/drivers/gpu/drm/nouveau/nouveau_abi16.c > b/drivers/gpu/drm/nouveau/nouveau_abi16.c > index e907c1d07887..e876f154963d 100644 > --- a/drivers/gpu/drm/nouveau/nouveau_abi16.c > +++ b/drivers/gpu/drm/nouveau/nouveau_abi16.c > @@ -488,7 +488,7 @@ > nouveau_abi16_ioctl_channel_alloc(ABI16_IOCTL_ARGS) > =C2=A0 goto done; > =C2=A0 break; > =C2=A0 case NV_DEVICE_INFO_V0_TURING: > - if (engine !=3D NV_DEVICE_HOST_RUNLIST_ENGINES_NVDEC) > { > + if (engine =3D=3D NV_DEVICE_HOST_RUNLIST_ENGINES_GR) { > =C2=A0 ret =3D nvif_object_ctor(&chan->chan->user, > "abi16CeWar", > =C2=A0 =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 0, TURING_DMA_COPY_A, > NULL, 0, > =C2=A0 =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 &chan->ce); >=20 > --- > base-commit: 70456f05d4b6396b22048c4b8cd3cb98ecf9f9e3 > change-id: 20261007-turing-async-ce-fix-42e179e27d4a >=20 > Best regards,