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Wed, 04 Sep 2024 08:35:13 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4848ZC7Q003119 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 4 Sep 2024 08:35:12 GMT Received: from [10.239.132.205] (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 4 Sep 2024 01:35:06 -0700 Message-ID: <729deff2-d5df-4409-b941-af22de408521@quicinc.com> Date: Wed, 4 Sep 2024 16:35:03 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 6/6] arm64: dts: qcom: add base QCS615 RIDE dts To: Krzysztof Kozlowski CC: Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , , , , References: <20240828-add_initial_support_for_qcs615-v1-0-5599869ea10f@quicinc.com> <20240828-add_initial_support_for_qcs615-v1-6-5599869ea10f@quicinc.com> <22qkvfravm6sxiq3xfavahg2u6b2pwlyzqbqvd55zym5zef3gi@m4bsqkdvggty> <17d0017e-b55d-4b32-9fd3-1a1a84e5ebf9@quicinc.com> <0ec92d59-0648-40ed-a522-307152b5c37d@kernel.org> <148451f2-6b1b-4616-b703-fd52e7afa2be@quicinc.com> <90c98fee-770c-4b83-9e05-6f04866094c2@kernel.org> From: Lijuan Gao In-Reply-To: <90c98fee-770c-4b83-9e05-6f04866094c2@kernel.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: nKO07I44AFKjSylCJ7uQwi3lZLXjSL9L X-Proofpoint-ORIG-GUID: nKO07I44AFKjSylCJ7uQwi3lZLXjSL9L X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-04_05,2024-09-04_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 mlxscore=0 phishscore=0 adultscore=0 suspectscore=0 priorityscore=1501 clxscore=1015 impostorscore=0 spamscore=0 mlxlogscore=783 bulkscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2409040065 在 8/28/2024 5:34 PM, Krzysztof Kozlowski 写道: > On 28/08/2024 11:31, Lijuan Gao wrote: >>>>>> +/ { >>>>>> + model = "Qualcomm Technologies, Inc. QCS615 Ride"; >>>>>> + compatible = "qcom,qcs615-ride", "qcom,qcs615"; >>>>>> + >>>>>> + chosen { >>>>>> + bootargs = "console=hvc0"; >>>>> >>>>> Noooo, last time I agreed on this, you told me later it is different. >>>>> >>>> In the early stages, enabling HVC is to more easily verify clock and >>>> PMIC related functions, as it’s difficult to debug without the console >>>> log. After the clock and PMIC are ready, we will enable the UART console. >>> >>> Working serial is supposed to be part of the early submission. >>> >> Okay, I will remove it in the next patch. > > Can you post next version with proper serial device? > > Best regards, > Krzysztof > Hi Krzysztof, Can we use the dts without console enabled as the first version? When the clock is ready, we will submit new changes to enable the UART console. -- Thx and BRs Lijuan Gao