From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 800DD354AEB for ; Sat, 25 Jul 2026 09:33:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.11 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784972013; cv=none; b=TRWfSYqy4LELafxYFtq35T6bZBTssEej/YeafWYMxu66iugIu+368wN0LUxxtUXLsmT7HnwPa3gRngMVSsjStSAA6Mj0H8233XFLJK9e8WNNvjqfbqBEkJxlzahHFaoQiZdvjtmtzGYMiRr4UC+Znf+Uogrg3+H7dzuRROa2Cm4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784972013; c=relaxed/simple; bh=qJPz8JL9IwRvHmycWJXeWqhEEMrFlxA70Sk7r6lACjU=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=V6u8FYJMepjZ2VZ/fn3GqPxioSLK+VeC2A+B0hjhTXvOkml2v+mZQiH+m7IGTxN5w7K5VRY45NPoNjZf3tEiVRx+jDg+kiSwl3bQHR7M27SAVR6YQLpzHDThprVdTb6eQWipGDFMTX7yJURtWoy9cJQxF4T5ntfE18RvedPlkwQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Avh1sptG; arc=none smtp.client-ip=198.175.65.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Avh1sptG" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1784972012; x=1816508012; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=qJPz8JL9IwRvHmycWJXeWqhEEMrFlxA70Sk7r6lACjU=; b=Avh1sptGG7xoFSAoyP0sDQJbZhzQeOVSR9Q3FPRO11XFjUhOymTJg/K4 dj3kDBtqkp+SKwuYcVz0OtkJE2sL8HyTEAQlOG8ZEF3I8iHA2QXVQhh/a rPFEpegCC8zF4SM5W/7z+zGOkj1UiM1GwRTw7QjI7kX+jYiItv2CDh4UP sepyEpx0OxQ1Vp+UYoSik8tRfPnNcyubTpXlDBv75UtlTzflGUEjeefQA 70V5TaDm7gAiK5n5Ly/lqolIOmijZl8+Af3CVFNv+cxO6eEGmVJPQr0t5 BGKN4erdHLorZ6F66NOPwrUqlAhDQ56qG78TyBNBHKe6JaRZ7sEXNSP5P w==; X-CSE-ConnectionGUID: 9eO9cBckTqCoLz8us7f+Tw== X-CSE-MsgGUID: RAm3xVrUQJCXoSYgXF/hIg== X-IronPort-AV: E=McAfee;i="6800,10657,11855"; a="95979069" X-IronPort-AV: E=Sophos;i="6.25,184,1779174000"; d="scan'208";a="95979069" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jul 2026 02:33:32 -0700 X-CSE-ConnectionGUID: QvDvTg7KSY+Sopx2II/SMA== X-CSE-MsgGUID: 6XlaVdq4RpuUougje+MRbw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.25,184,1779174000"; d="scan'208";a="263922656" Received: from chenyu-dev.sh.intel.com ([10.239.62.107]) by fmviesa005.fm.intel.com with ESMTP; 25 Jul 2026 02:33:29 -0700 From: Chen Yu To: tony.luck@intel.com, reinette.chatre@intel.com Cc: tglx@kernel.org, bp@alien8.de, mingo@redhat.com, dave.hansen@linux.intel.com, hpa@zytor.com, fenghuay@nvidia.com, babu.moger@amd.com, chen.yu@linux.dev, x86@kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v6 8/9] x86/resctrl: Introduce erdt_cpu_has() and erdt_support() Date: Sat, 25 Jul 2026 17:23:45 +0800 Message-Id: <72f90c77f17acf481f6a5cbcd46d8a1e5ee132f0.1784968626.git.yu.c.chen@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Introduce erdt_cpu_has() to verify if a specific RDT feature is backed by an ERDT table. erdt_cpu_has() is derived from rdt_cpu_has(), which not only considers firmware (ERDT table and its sub-tables) support for an event, but also considers userspace input like "rdt=!cmt". Similar to rdt_cpu_has(), erdt_cpu_has() expects an x86 feature flag as parameter. Introduce erdt_support() as a helper called by erdt_cpu_has() to check whether the ERDT firmware supports a given feature. erdt_support() deliberately claims no feature yet and returns false. A feature may only be reported as ERDT backed once the low level accessors that read its monitoring data via MMIO exist, otherwise callers would take the ERDT path and find no implementation behind it. Features are added to erdt_support() as their MMIO implementations are introduced. Signed-off-by: Chen Yu Tested-by: Hongyu Ning --- v5->v6: New patch. Split out of the v5 "x86/resctrl: Introduce helpers to read L3 occupancy via MMIO" patch, which carried two logical changes. (Reinette Chatre) Rename erdt_support_features() to erdt_support(). (Reinette Chatre) Reword "expects x86 feature flag as parameters" to "expects an x86 feature flag as parameter". (Reinette Chatre) Explain in the changelog why erdt_support() returns false here: a feature is only reported as ERDT backed once the MMIO accessors that read its monitoring data exist. (Reinette Chatre) Drop the unused asm/cpufeatures.h include. (Reinette Chatre) --- arch/x86/include/asm/resctrl.h | 1 + arch/x86/kernel/cpu/resctrl/core.c | 23 +++++++++++++++++++++++ arch/x86/kernel/cpu/resctrl/erdt.c | 5 +++++ arch/x86/kernel/cpu/resctrl/internal.h | 2 ++ 4 files changed, 31 insertions(+) diff --git a/arch/x86/include/asm/resctrl.h b/arch/x86/include/asm/resctrl.h index e60c2aea7ebd..5491853113dd 100644 --- a/arch/x86/include/asm/resctrl.h +++ b/arch/x86/include/asm/resctrl.h @@ -49,6 +49,7 @@ DECLARE_STATIC_KEY_FALSE(rdt_enable_key); DECLARE_STATIC_KEY_FALSE(rdt_alloc_enable_key); DECLARE_STATIC_KEY_FALSE(rdt_mon_enable_key); +bool erdt_cpu_has(int flag); int erdt_get_scale(void); static inline bool resctrl_arch_alloc_capable(void) diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c index c2568b29474e..74087d04f1da 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -887,6 +887,29 @@ bool rdt_cpu_has(int flag) return ret; } +bool erdt_cpu_has(int flag) +{ + struct rdt_options *o; + bool ret; + + ret = erdt_support(flag); + + if (!ret) + return ret; + + for (o = rdt_options; o < &rdt_options[NUM_RDT_OPTIONS]; o++) { + if (flag == o->flag) { + if (o->force_off) + ret = false; + if (o->force_on) + ret = true; + break; + } + } + + return ret; +} + bool resctrl_arch_is_evt_configurable(enum resctrl_event_id evt) { if (!rdt_cpu_has(X86_FEATURE_BMEC)) diff --git a/arch/x86/kernel/cpu/resctrl/erdt.c b/arch/x86/kernel/cpu/resctrl/erdt.c index 422618991927..167d2dfc368d 100644 --- a/arch/x86/kernel/cpu/resctrl/erdt.c +++ b/arch/x86/kernel/cpu/resctrl/erdt.c @@ -37,6 +37,11 @@ static int erdt_max_rmid; /* Scale to bytes for the monitoring counters when ERDT is enabled. */ static int erdt_scale; +bool erdt_support(int flag) +{ + return false; +} + int erdt_get_max_rmid(void) { return erdt_max_rmid; diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/resctrl/internal.h index 27f28b0fead8..d14a36d65b05 100644 --- a/arch/x86/kernel/cpu/resctrl/internal.h +++ b/arch/x86/kernel/cpu/resctrl/internal.h @@ -289,6 +289,8 @@ static inline void intel_aet_mon_domain_setup(int cpu, int id, struct rdt_resour static inline bool intel_handle_aet_option(bool force_off, char *tok) { return false; } #endif +bool erdt_support(int flag); +bool erdt_cpu_has(int flag); int erdt_get_max_rmid(void); int erdt_init(void); void erdt_exit(void); -- 2.25.1