From: Tiezhu Yang <yangtiezhu@loongson.cn>
To: Jiaxun Yang <jiaxun.yang@flygoat.com>,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Huacai Chen <chenhc@lemote.com>
Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org,
Xuefeng Li <lixuefeng@loongson.cn>
Subject: Re: [PATCH 1/6] MIPS: Loongson64: Do not write the read only field LPA of CP0_CONFIG3
Date: Fri, 30 Oct 2020 14:22:21 +0800 [thread overview]
Message-ID: <7306f77f-b70a-862d-b4c5-d8f20102dc62@loongson.cn> (raw)
In-Reply-To: <a384c467-048d-1296-4a0d-ecbf4cea844d@flygoat.com>
On 10/30/2020 12:00 PM, Jiaxun Yang wrote:
>
>
> 在 2020/10/29 16:02, Tiezhu Yang 写道:
>> The field LPA of CP0_CONFIG3 register is read only for Loongson64, so
>> the
>> write operations are meaningless, remove them.
>>
>> Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
>> ---
>> arch/mips/include/asm/mach-loongson64/kernel-entry-init.h | 8 --------
>> arch/mips/loongson64/numa.c | 3 ---
>> 2 files changed, 11 deletions(-)
> Hi Tiezhu,
>
> AFAIK it's not read only on 3A1000.
> Have you check with hardware guys?
Hi Jiaxun,
Yes, I checked it before send this patch, the field LPA of CP0_CONFIG3
on 3A1000 is also read only, we can see the related description in the
chapter 3.22 of Loongson_3A1000_cpu_user_2.
And also we can see the following description in the chapter
"9.45 Configuration Register 3 (CP0 Register 16, Select 3)" of
MD00091-2B-MIPS64PRA-AFP-05.04:
"The Config3 register encodes additional capabilities.
All fields in the Config3 register are read-only."
Thanks,
Tiezhu
>
> Thanks.
>
> - Jiaxun
next prev parent reply other threads:[~2020-10-30 6:22 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-29 8:02 [PATCH 0/6] Modify some registers operations and move decode_cpucfg() to loongson_regs.h Tiezhu Yang
2020-10-29 8:02 ` [PATCH 1/6] MIPS: Loongson64: Do not write the read only field LPA of CP0_CONFIG3 Tiezhu Yang
2020-10-30 4:00 ` Jiaxun Yang
2020-10-30 6:22 ` Tiezhu Yang [this message]
2020-10-30 12:13 ` Jiaxun Yang
2020-11-02 10:47 ` Jiaxun Yang
2020-10-29 8:02 ` [PATCH 2/6] MIPS: Loongson64: Set the field ELPA of CP0_PAGEGRAIN only once Tiezhu Yang
2020-10-29 8:02 ` [PATCH 3/6] MIPS: Loongson64: Set IPI_Enable register per core by itself Tiezhu Yang
2020-10-29 8:02 ` [PATCH 4/6] MIPS: Loongson64: Add Mail_Send support for 3A4000+ CPU Tiezhu Yang
2020-10-30 4:06 ` Jiaxun Yang
2020-10-30 6:37 ` Tiezhu Yang
2020-10-29 8:03 ` [PATCH 5/6] MIPS: Loongson64: Make sure the PC address is correct when 3A4000+ CPU hotplug Tiezhu Yang
2020-10-29 8:03 ` [PATCH 6/6] MIPS: Loongson64: Move decode_cpucfg() to loongson_regs.h Tiezhu Yang
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