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From: John Garry <john.garry@huawei.com>
To: Niklas Cassel <Niklas.Cassel@wdc.com>
Cc: Damien Le Moal <damien.lemoal@opensource.wdc.com>,
	"jejb@linux.ibm.com" <jejb@linux.ibm.com>,
	"martin.petersen@oracle.com" <martin.petersen@oracle.com>,
	"jinpu.wang@cloud.ionos.com" <jinpu.wang@cloud.ionos.com>,
	"linux-scsi@vger.kernel.org" <linux-scsi@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Linuxarm <linuxarm@huawei.com>,
	yangxingui <yangxingui@huawei.com>,
	yanaijie <yanaijie@huawei.com>
Subject: Re: [PATCH v5 0/7] libsas and drivers: NCQ error handling
Date: Mon, 24 Oct 2022 17:20:06 +0100	[thread overview]
Message-ID: <7345fb7f-f713-2fdf-5fce-8a0549ff3b7e@huawei.com> (raw)
In-Reply-To: <Y1aOrlmp3IDMDLS1@x1-carbon>

On 24/10/2022 14:10, Niklas Cassel wrote:
> At least on the HoneyComb LX2,
> running with "arm-smmu.disable_bypass=0 iommu.passthrough=1" gives a working
> system (and working pm80xx).
> 
> The ACPI IOMMU code that parses the ACPI IORT RMR revision E.d node
> was first included in kernel v6.0:
> https://lore.kernel.org/linux-iommu/20220615101044.1972-1-shameerali.kolothum.thodi@huawei.com/
> 
> However, the HoneyComb edk2-platforms code has not yet been updated to add
> a ACPI IORT RMR revision E.d node.
> 
> Considering that it works with "arm-smmu.disable_bypass=0 iommu.passthrough=1",
> I assume that the ACPI IORT RMR node basically just defines a number of
> memory regions which the IOMMU should treat as "bypass", while all other
> memory has to be re-mapped via the IOMMU as per usual.

Hi Niklas,

As I expected, unfortunately that did not help. Note that I actually 
can't use passthrough on my platform due to SMMUv3 implementation bug, 
so I just disable SMMUv3 entirely via kernel config.

I'm still betting on a memory ordering issue for me.

Thanks again,
John

  reply	other threads:[~2022-10-24 19:23 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-27  7:04 John Garry
2022-09-27  7:04 ` [PATCH v5 1/7] scsi: libsas: Add sas_ata_device_link_abort() John Garry
2022-09-27  7:04 ` [PATCH v5 2/7] scsi: hisi_sas: Move slot variable definition in hisi_sas_abort_task() John Garry
2022-09-27  7:04 ` [PATCH v5 3/7] scsi: hisi_sas: Add SATA_DISK_ERR bit handling for v3 hw John Garry
2022-09-27  7:04 ` [PATCH v5 4/7] scsi: hisi_sas: Modify v3 HW SATA disk error state completion processing John Garry
2022-09-27  7:04 ` [PATCH v5 5/7] scsi: pm8001: Modify task abort handling for SATA task John Garry
2022-09-27  7:04 ` [PATCH v5 6/7] scsi: pm8001: Use sas_ata_device_link_abort() to handle NCQ errors John Garry
2022-09-27  7:04 ` [PATCH v5 7/7] scsi: libsas: Make sas_{alloc, alloc_slow, free}_task() private John Garry
2022-10-04 13:05 ` [PATCH v5 0/7] libsas and drivers: NCQ error handling Niklas Cassel
2022-10-04 14:04   ` John Garry
2022-10-05  8:53     ` John Garry
2022-10-05 21:28       ` Niklas Cassel
2022-10-05 21:36         ` Damien Le Moal
2022-10-05 22:11           ` Niklas Cassel
2022-10-05 22:42             ` Damien Le Moal
2022-10-06  8:33               ` John Garry
2022-10-06 14:45                 ` Niklas Cassel
2022-10-06 16:41                   ` John Garry
2022-10-24 12:24                     ` Niklas Cassel
2022-10-24 12:44                       ` John Garry
2022-10-24 13:10                         ` Niklas Cassel
2022-10-24 16:20                           ` John Garry [this message]
2022-10-06 22:57                   ` Damien Le Moal
2022-10-06  8:37         ` John Garry

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