From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.4 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,NICE_REPLY_A, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8D582C388F9 for ; Thu, 22 Oct 2020 23:25:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 18B3C223BF for ; Thu, 22 Oct 2020 23:25:15 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="AGgzhLcZ" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S373368AbgJVXZN (ORCPT ); Thu, 22 Oct 2020 19:25:13 -0400 Received: from z5.mailgun.us ([104.130.96.5]:36661 "EHLO z5.mailgun.us" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S373335AbgJVXZM (ORCPT ); Thu, 22 Oct 2020 19:25:12 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1603409111; h=Content-Transfer-Encoding: Content-Type: In-Reply-To: MIME-Version: Date: Message-ID: From: References: Cc: To: Subject: Sender; bh=7RS3WmnFO6lzb/dbTyH+68KVi2Ps4HU4TjXSx+rxCds=; b=AGgzhLcZOOrnBVxCx1w0Aecxx7iJVQlAw0sLql/D/AqB5dWcrj/3Zcb3eaief/QtIiRopwCr iAD00VLsImupDrWZ0puHfqEBwMnNScqwcJ+zDj7BuPzyqA1HHphJhXnxJHk0wap7gSMwM22g EyRwX31pO4HIJLJ1bI+hsp+fblQ= X-Mailgun-Sending-Ip: 104.130.96.5 X-Mailgun-Sid: WyI0MWYwYSIsICJsaW51eC1rZXJuZWxAdmdlci5rZXJuZWwub3JnIiwgImJlOWU0YSJd Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n02.prod.us-east-1.postgun.com with SMTP id 5f9214d76308b7b0f94c2e55 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Thu, 22 Oct 2020 23:25:11 GMT Sender: hemantk=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id D4347C433FE; Thu, 22 Oct 2020 23:25:10 +0000 (UTC) Received: from [10.46.162.249] (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: hemantk) by smtp.codeaurora.org (Postfix) with ESMTPSA id 91CEFC433C9; Thu, 22 Oct 2020 23:25:09 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 91CEFC433C9 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=hemantk@codeaurora.org Subject: Re: [PATCH v8 4/4] bus: mhi: Add userspace client interface driver To: Loic Poulain Cc: Manivannan Sadhasivam , Greg Kroah-Hartman , linux-arm-msm , open list , Jeffrey Hugo , Bhaumik Bhatt References: <1603354958-24025-1-git-send-email-hemantk@codeaurora.org> <1603354958-24025-5-git-send-email-hemantk@codeaurora.org> From: Hemant Kumar Message-ID: <737e3445-ba4c-b80c-2da4-d33d499d96c6@codeaurora.org> Date: Thu, 22 Oct 2020 16:25:08 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Loic, On 10/22/20 3:20 AM, Loic Poulain wrote: > Hi Hemant, > > A few comments inline. > > On Thu, 22 Oct 2020 at 10:22, Hemant Kumar wrote: >> >> This MHI client driver allows userspace clients to transfer >> raw data between MHI device and host using standard file operations. >> Driver instantiates UCI device object which is associated to device >> file node. UCI device object instantiates UCI channel object when device >> file node is opened. UCI channel object is used to manage MHI channels >> by calling MHI core APIs for read and write operations. MHI channels >> are started as part of device open(). MHI channels remain in start >> state until last release() is called on UCI device file node. Device >> file node is created with format >> [..] >> + >> +/** >> + * struct uci_chan - MHI channel for a UCI device >> + * @udev: associated UCI device object >> + * @ul_wq: wait queue for writer >> + * @write_lock: mutex write lock for ul channel >> + * @dl_wq: wait queue for reader >> + * @read_lock: mutex read lock for dl channel >> + * @dl_lock: spin lock >> + * @pending: list of dl buffers userspace is waiting to read >> + * @cur_buf: current buffer userspace is reading >> + * @dl_size: size of the current dl buffer userspace is reading >> + * @ref_count: uci_chan reference count >> + */ >> +struct uci_chan { >> + struct uci_dev *udev; >> + wait_queue_head_t ul_wq; >> + >> + /* ul channel lock to synchronize multiple writes */ >> + struct mutex write_lock; >> + >> + wait_queue_head_t dl_wq; >> + >> + /* dl channel lock to synchronize multiple reads */ >> + struct mutex read_lock; >> + >> + /* >> + * protects pending and cur_buf members in bh context, channel release, >> + * read and poll >> + */ >> + spinlock_t dl_lock; > > Maybe I'm wrong, but I think it would be clearer and simpler for > dl_lock to be only a lock for the pending RX list (e.g. pending_lock), > for protecting against concurrent access in chardev read ops > (consumer) and MHI download callback (producer). cur_buf is the > currently read buffer, and so could be simply protected by the > read_lock mutex (never accessed from bh/irq callback context). You have a good point. I can protect pending list related operations using spin lock and call it pending_lock which would be used in dl_xfer call back, channel release, read and poll. Use read lock for cur_buf in read(). > >> + >> + struct list_head pending; >> + struct uci_buf *cur_buf; >> + size_t dl_size; >> + struct kref ref_count; >> +}; >> + >> +/** [..] >> +static void mhi_dl_xfer_cb(struct mhi_device *mhi_dev, >> + struct mhi_result *mhi_result) >> +{ >> + struct uci_dev *udev = dev_get_drvdata(&mhi_dev->dev); >> + struct uci_chan *uchan = udev->uchan; >> + struct device *dev = &mhi_dev->dev; >> + struct uci_buf *ubuf; >> + size_t dl_buf_size = udev->mtu - sizeof(*ubuf); >> + >> + dev_dbg(dev, "status: %d receive_len: %zu\n", >> + mhi_result->transaction_status, mhi_result->bytes_xferd); >> + >> + if (mhi_result->transaction_status == -ENOTCONN) { >> + kfree(mhi_result->buf_addr); >> + return; >> + } > > It would be more robust to test only transaction_status values that > allow you to consider the buffer as valid, AFAIU 0 and -EOVERFLOW. > That would prevent breaking that code if new transaction_status errors > are returned in the futur (e.g. -EIO...). I agree, will use this instead if (mhi_result->transaction_status && mhi_result->transaction_status != -EOVERFLOW) > > >> + >> + ubuf = mhi_result->buf_addr + dl_buf_size; >> + ubuf->data = mhi_result->buf_addr; >> + ubuf->len = mhi_result->bytes_xferd; >> + spin_lock_bh(&uchan->dl_lock); >> + list_add_tail(&ubuf->node, &uchan->pending); >> + spin_unlock_bh(&uchan->dl_lock); >> + >> + wake_up(&uchan->dl_wq); >> +} >> + Thanks, Hemant -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project