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Tue, 22 Oct 2024 06:34:06 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA01.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 49M6Y4Gb016111 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 22 Oct 2024 06:34:04 GMT Received: from [10.217.216.152] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 21 Oct 2024 23:34:00 -0700 Message-ID: <73abe2b9-ad72-449f-b3e3-a96128cf75a4@quicinc.com> Date: Tue, 22 Oct 2024 12:03:57 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 07/11] clk: qcom: rpmh: add support for SAR2130P To: Dmitry Baryshkov , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Philipp Zabel , Konrad Dybcio CC: , , , References: <20241021-sar2130p-clocks-v2-0-383e5eb123a2@linaro.org> <20241021-sar2130p-clocks-v2-7-383e5eb123a2@linaro.org> Content-Language: en-US From: Taniya Das In-Reply-To: <20241021-sar2130p-clocks-v2-7-383e5eb123a2@linaro.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: VO-xy0SQ6-ZNRM_uGFxNSFPLcrNlx5EK X-Proofpoint-GUID: VO-xy0SQ6-ZNRM_uGFxNSFPLcrNlx5EK X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 adultscore=0 phishscore=0 spamscore=0 clxscore=1015 priorityscore=1501 impostorscore=0 mlxscore=0 suspectscore=0 lowpriorityscore=0 bulkscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2410220041 On 10/21/2024 4:00 PM, Dmitry Baryshkov wrote: > Define clocks as supported by the RPMh on the SAR2130P platform. It > seems that on this platform RPMh models only CXO clock. > > Signed-off-by: Dmitry Baryshkov > --- > drivers/clk/qcom/clk-rpmh.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c > index 4acde937114af3d7fdc15f3d125a72d42d0fde21..8cb15430d0171a8ed6b05e51d1901af63a4564c4 100644 > --- a/drivers/clk/qcom/clk-rpmh.c > +++ b/drivers/clk/qcom/clk-rpmh.c > @@ -389,6 +389,16 @@ DEFINE_CLK_RPMH_BCM(ipa, "IP0"); > DEFINE_CLK_RPMH_BCM(pka, "PKA0"); > DEFINE_CLK_RPMH_BCM(qpic_clk, "QP0"); > > +static struct clk_hw *sar2130p_rpmh_clocks[] = { > + [RPMH_CXO_CLK] = &clk_rpmh_bi_tcxo_div1.hw, > + [RPMH_CXO_CLK_A] = &clk_rpmh_bi_tcxo_div1_ao.hw, > +}; > + Dimtry, could you please add these clocks as well? DEFINE_CLK_RPMH_VRM-- > rf_clk1, rf_clk1_ao, "clka1", 1 DEFINE_CLK_RPMH_VRM --> ln_bb_clk7, ln_bb_clk7_ao, "clka7", 2 DEFINE_CLK_RPMH_VRM --> ln_bb_clk8, ln_bb_clk8_ao, "clka8", 4 DEFINE_CLK_RPMH_VRM --> ln_bb_clk9, ln_bb_clk9_ao, "clka9", 2 > +static const struct clk_rpmh_desc clk_rpmh_sar2130p = { > + .clks = sar2130p_rpmh_clocks, > + .num_clks = ARRAY_SIZE(sar2130p_rpmh_clocks), > +}; > + -- Thanks & Regards, Taniya Das.