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From: Hangxiang Ma <hangxiang.ma@oss.qualcomm.com>
To: Bryan O'Donoghue <bod@kernel.org>,
	Nihal Kumar Gupta <nihal.gupta@oss.qualcomm.com>,
	Loic Poulain <loic.poulain@oss.qualcomm.com>,
	Robert Foss <rfoss@kernel.org>,
	Andi Shyti <andi.shyti@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>, Vinod Koul <vkoul@kernel.org>,
	Neil Armstrong <neil.armstrong@linaro.org>,
	Manivannan Sadhasivam <mani@kernel.org>,
	Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Suresh Vankadara <svankada@qti.qualcomm.com>,
	Vikram Sharma <vikram.sharma@oss.qualcomm.com>,
	linux-i2c@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-phy@lists.infradead.org, linux-media@vger.kernel.org
Subject: Re: [PATCH v3 5/5] media: qcom: camss: Add support for Hawi
Date: Fri, 30 Oct 2026 23:25:41 +0800	[thread overview]
Message-ID: <73b1f591-69cf-471b-9763-a0b719c74501@oss.qualcomm.com> (raw)
In-Reply-To: <5817be6b-7180-407b-acb5-8c5fdef4edfb@kernel.org>

On 10/30/2026 11:04 PM, Bryan O'Donoghue wrote:
> On 30/10/2026 12:43, Nihal Kumar Gupta wrote:
>> +static const struct camss_subdev_resources csid_res_hawi[] = {
>> +    /* CSID0 */
>> +    {
>> +        .clock = { "csid", "csid_csiphy_rx" },
>> +        .clock_rate = { { 480000000 },
>> +                { 480000000 } },
>> +        .reg = { "csid0" },
>> +        .interrupt = { "csid0" },
>> +        .csid = {
>> +            .parent_dev_ops = &vfe_parent_dev_ops,
>> +            .hw_ops = &csid_ops_1190,
>> +            .formats = &csid_formats_gen2
>> +        }
> 
> This looks strange, why is there only one clock rate ?
> 
> ---
> bod
Hi Bryan, the current CAMSS CSID code always selects the first frequency 
listed for each clock in the CAMSS resource table.

In camss-csid.c:

[...]
} else if (clock->nfreqs) {
         clk_set_rate(clock->clk, clock->freq[0]);
}
[...]

For the CSID and CSID_CSIPHY_RX clocks, the hardware supports three 
clock rates: 200 MHz, 300 MHz, and 480 MHz. If I remember correctly, 
200MHz and 300 MHz is not sufficient for the sensor's output pixel rate, 
so we need to use the highest rate, 480 MHz, to meet the bandwidth 
requirement. Thanks a lot.

---
Best Regards,
Hangxiang

  reply	other threads:[~2026-10-30 15:25 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-30 12:43 [PATCH v3 0/5] Add CAMSS support for Qualcomm Hawi and Maili Nihal Kumar Gupta
2026-10-30 12:43 ` [PATCH v3 1/5] dt-bindings: i2c: qcom,i2c-cci: Add Hawi compatible Nihal Kumar Gupta
2026-10-30 12:43 ` [PATCH v3 2/5] dt-bindings: phy: qcom,x1e80100-csi2-phy: Add Hawi and Maili compatibles Nihal Kumar Gupta
2026-10-30 12:43 ` [PATCH v3 3/5] dt-bindings: media: Add CAMSS device for Hawi and Maili Nihal Kumar Gupta
2026-10-30 13:38   ` Loic Poulain
2026-10-30 14:05     ` Hangxiang Ma
2026-10-30 12:43 ` [PATCH v3 4/5] phy: qcom-mipi-csi2: Add Hawi support Nihal Kumar Gupta
2026-10-30 13:39   ` Loic Poulain
2026-10-30 12:43 ` [PATCH v3 5/5] media: qcom: camss: Add support for Hawi Nihal Kumar Gupta
2026-10-30 15:04   ` Bryan O'Donoghue
2026-10-30 15:25     ` Hangxiang Ma [this message]
2026-10-30 15:05   ` Bryan O'Donoghue
2026-10-30 15:29     ` Hangxiang Ma

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