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From: zl020895  <zl020895@163.com>
To: "Bartosz Golaszewski" <brgl@kernel.org>
Cc: longzhao@ambarella.com,
	"Long Zhao via B4 Relay"
	<devnull+longzhao.ambarella.com@kernel.org>,
	"Linus Walleij" <linusw@kernel.org>,
	"Michael Walle" <mwalle@kernel.org>,
	"Andy Shevchenko" <andriy.shevchenko@linux.intel.com>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski@oss.qualcomm.com>,
	"Conor Dooley" <conor+dt@kernel.org>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	"Conor Dooley" <conor.dooley@microchip.com>,
	"Chanho Min" <chanho.min@lge.com>,
	linux-gpio@vger.kernel.org
Subject: Re:Re: [PATCH 0/7] gpio: add Ambarella CV75 PL061 support
Date: Tue, 13 Oct 2026 22:10:41 +0800 (CST)	[thread overview]
Message-ID: <73c4ceaf.9c2f.1a13599e8ca.Coremail.zl020895@163.com> (raw)
In-Reply-To: <CAMRc=MezU71ByUoO-GMxSwsFsGZTUmQisYYrYEwtdbwyFiEqsw@mail.gmail.com>

Hi Bart,

Yes. This is effectively a v10 of the GPIO patches from the combined CV75 series. I split them out and restarted the numbering at v1 because some maintainers preferred separate series, so I am trying that.

Best regards,
Long Zhao

At 2026-10-13 20:58:08, "Bartosz Golaszewski" <brgl@kernel.org> wrote:
>On Fri, 9 Oct 2026 12:57:53 +0200, Long Zhao via B4 Relay
><devnull+longzhao.ambarella.com@kernel.org> said:
>> Split from the combined CV75 bring-up series. These patches convert
>> the ARM PL061 data path to regmap, then add the CV75 layout.
>>
>> Please take this series through the GPIO tree. The quirk, the PL061
>> conversion and the Ambarella layout belong together.
>>
>> The GPIO driver does not depend on ARCH_AMBARELLA. The binding uses
>> the ambarella vendor prefix, which is added by the SoC series and is
>> not in mainline yet; dt_binding_check needs that prefix.
>>
>> GPIO data path uses gpio-regmap with two layouts (ARM PrimeCell and
>> Ambarella). ARM PL061 sets GPIO_REGMAP_QUIRK_SET_AFTER_DIR. IRQ stays
>> a custom PL061 irqchip. The linear domain is created with the PL061
>> private data and attached by gpio-regmap. regmap-irq is not used.
>>
>> Tested on the CV75 EVK. The board boots. gpio-hammer toggles gpiochip0 line 26 ten times, and gpio-event-mon on line 27 records ten alternating rising and falling edges.
>>
>> Changes since the patches in the combined v9:
>> - dt-bindings: explain that CV75 is a modified PL061 (Conor)
>> - gpio-regmap: move quirks after fixed_direction_output (Andy)
>> - gpio: pl061: use regmap_test_bits(), regmap_clear_bits() and
>>   regmap_set_bits() for direction and interrupt enable (Andy).
>>   The data register stays regmap_write(): regmap_set_bits() can
>>   only set bits to 1, so it cannot drive a pin low.
>> - gpio: pl061: add Ambarella register-layout variant: cache DAT
>>   (REGCACHE_FLAT_S, not volatile) so gpio_set() does not
>>   read-modify-write the pin level (Sashiko). Drop the Reviewed-by
>>   from Andy and Linus on this commit; the code changed after
>>   those tags.
>>
>> Link: https://patch.msgid.link/20261001-cv75-v5-v9-0-486cc289a4b8@ambarella.com
>>
>
>Is this effectively a v10 of this series or something entirely new?
>
>Bart

  reply	other threads:[~2026-10-13 14:12 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-09 10:57 Long Zhao via B4 Relay
2026-10-09 10:57 ` [PATCH 1/7] dt-bindings: gpio: pl061: add Ambarella CV75 variant Long Zhao via B4 Relay
2026-10-09 11:32   ` Krzysztof Kozlowski
2026-10-09 10:57 ` [PATCH 2/7] gpiolib: regmap: add GPIO_REGMAP_QUIRK_SET_AFTER_DIR Long Zhao via B4 Relay
2026-10-09 11:17   ` Michael Walle
2026-10-09 10:57 ` [PATCH 3/7] gpio: pl061: convert register access to regmap Long Zhao via B4 Relay
2026-10-13  7:10   ` Andy Shevchenko
2026-10-09 10:57 ` [PATCH 4/7] gpio: pl061: use IRQ_TYPE_LEVEL_MASK and IRQ_TYPE_EDGE_BOTH Long Zhao via B4 Relay
2026-10-09 10:57 ` [PATCH 5/7] gpio: pl061: use cleanup helpers for locks Long Zhao via B4 Relay
2026-10-13  7:12   ` Andy Shevchenko
2026-10-09 10:57 ` [PATCH 6/7] gpio: pl061: switch data path to gpio-regmap Long Zhao via B4 Relay
2026-10-13  7:15   ` Andy Shevchenko
2026-10-13  8:56     ` zl020895
2026-10-13  9:50       ` Andy Shevchenko
2026-10-13 10:41         ` zl020895
2026-10-09 10:58 ` [PATCH 7/7] gpio: pl061: add Ambarella register-layout variant Long Zhao via B4 Relay
2026-10-13  7:17   ` Andy Shevchenko
2026-10-13  8:59     ` zl020895
2026-10-13  9:46       ` Andy Shevchenko
2026-10-09 11:32 ` [PATCH 0/7] gpio: add Ambarella CV75 PL061 support Krzysztof Kozlowski
2026-10-13 12:58 ` Bartosz Golaszewski
2026-10-13 14:10   ` zl020895 [this message]
2026-10-13 15:09     ` Bartosz Golaszewski
2026-10-13 15:36       ` zl020895

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