From: "Chuyi Zhou" <zhouchuyi@bytedance.com>
To: "Sebastian Andrzej Siewior" <bigeasy@linutronix.de>
Cc: <tglx@kernel.org>, <mingo@redhat.com>, <luto@kernel.org>,
<peterz@infradead.org>, <paulmck@kernel.org>,
<muchun.song@linux.dev>, <bp@alien8.de>,
<dave.hansen@linux.intel.com>, <pbonzini@redhat.com>,
<clrkwllms@kernel.org>, <rostedt@goodmis.org>,
<nadav.amit@gmail.com>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 4/5] x86/mm: Decouple kernel TLB flushes from flush_tlb_info
Date: Wed, 23 Sep 2026 18:54:34 +0800 [thread overview]
Message-ID: <73ce6c91-d654-4890-8497-11a8632205bf@bytedance.com> (raw)
In-Reply-To: <20260923105037.4wyE0RLj@linutronix.de>
On 2026-09-23 6:50 p.m., Sebastian Andrzej Siewior wrote:
> On 2026-09-23 18:43:55 [+0800], Chuyi Zhou wrote:
>> The ceiling check does not cover all possible inputs, though. For
>> example, with start = ULONG_MAX - PAGE_SIZE + 1 and end = TLB_FLUSH_ALL,
>
> Well, due to the number of pages when it is considered to do a full
> flush. But "ULONG_MAX - PAGE_SIZE + 1" isn't a valid start input, is
> it?
Correct. On x86-64 that address falls in the unused hole at the top
of the address space, so it does not represent the start of an actual
kernel mapping.
My example only illustrated a difference for arbitrary input values;
it did not demonstrate a valid use case that needs the explicit check.
I'll drop it.
>
> Sebastian
next prev parent reply other threads:[~2026-09-23 10:55 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-21 9:53 [PATCH 0/5] x86/mm: Allow preemption while waiting for kernel TLB flushes Chuyi Zhou
2026-09-21 9:53 ` [PATCH 1/5] x86/mm: Account for remote kernel TLB flush requests Chuyi Zhou
2026-09-21 9:53 ` [PATCH 2/5] x86/mm: Share the full TLB flush dispatch Chuyi Zhou
2026-09-23 9:17 ` Sebastian Andrzej Siewior
2026-09-23 9:25 ` Chuyi Zhou
2026-09-21 9:53 ` [PATCH 3/5] x86/mm: Extract the TLB range flush threshold check Chuyi Zhou
2026-09-21 9:53 ` [PATCH 4/5] x86/mm: Decouple kernel TLB flushes from flush_tlb_info Chuyi Zhou
2026-09-23 9:28 ` Sebastian Andrzej Siewior
2026-09-23 10:43 ` Chuyi Zhou
2026-09-23 10:50 ` Sebastian Andrzej Siewior
2026-09-23 10:54 ` Chuyi Zhou [this message]
2026-09-21 9:59 ` [PATCH 5/5] x86/mm: Re-enable preemption before waiting for kernel TLB flushes Chuyi Zhou
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