From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752599AbdASMrk (ORCPT ); Thu, 19 Jan 2017 07:47:40 -0500 Received: from mail-pf0-f181.google.com ([209.85.192.181]:34996 "EHLO mail-pf0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752364AbdASMrj (ORCPT ); Thu, 19 Jan 2017 07:47:39 -0500 Subject: Re: [PATCH v20 08/17] clocksource/drivers/arm_arch_timer: Rework counter frequency detection. To: Fu Wei References: <20170118132541.8989-1-fu.wei@linaro.org> <20170118132541.8989-9-fu.wei@linaro.org> Cc: "Rafael J. Wysocki" , Len Brown , Daniel Lezcano , Thomas Gleixner , Marc Zyngier , Mark Rutland , Lorenzo Pieralisi , Sudeep Holla , linux-arm-kernel@lists.infradead.org, Linaro ACPI Mailman List , Linux Kernel Mailing List , ACPI Devel Maling List , rruigrok@codeaurora.org, "Abdulhamid, Harb" , Christopher Covington , Timur Tabi , G Gregory , Al Stone , Jon Masters , Wei Huang , Arnd Bergmann , Catalin Marinas , Will Deacon , Suravee Suthikulpanit , Leo Duran , Wim Van Sebroeck , Guenter Roeck , linux-watchdog@vger.kernel.org, Tomasz Nowicki , Christoffer Dall , Julien Grall From: Hanjun Guo Message-ID: <74160889-5eb0-ceb2-2727-61e9d538cf2f@linaro.org> Date: Thu, 19 Jan 2017 20:41:14 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:45.0) Gecko/20100101 Thunderbird/45.6.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2017/1/19 17:44, Fu Wei wrote: > Hi Hanjun, > > On 19 January 2017 at 16:02, Hanjun Guo wrote: >> Hi Fuwei, >> >> One comments below. >> >> >> On 2017/1/18 21:25, fu.wei@linaro.org wrote: >>> >>> From: Fu Wei >>> >>> The counter frequency detection call(arch_timer_detect_rate) combines two >>> ways to get counter frequency: system coprocessor register and MMIO timer. >>> But in a specific timer init code, we only need one way to try: >>> getting frequency from MMIO timer register will be needed only when we >>> init MMIO timer; getting frequency from system coprocessor register will >>> be needed only when we init arch timer. >>> >>> This patch separates paths to determine frequency: >>> Separate out the MMIO frequency and the sysreg frequency detection call, >>> and use the appropriate one for the counter. >>> >>> Signed-off-by: Fu Wei >>> --- >>> drivers/clocksource/arm_arch_timer.c | 40 >>> ++++++++++++++++++++++-------------- >>> 1 file changed, 25 insertions(+), 15 deletions(-) >>> >>> diff --git a/drivers/clocksource/arm_arch_timer.c >>> b/drivers/clocksource/arm_arch_timer.c >>> index 6484f84..9482481 100644 >>> --- a/drivers/clocksource/arm_arch_timer.c >>> +++ b/drivers/clocksource/arm_arch_timer.c >>> @@ -488,23 +488,33 @@ static int arch_timer_starting_cpu(unsigned int cpu) >>> return 0; >>> } >>> >>> -static void arch_timer_detect_rate(void __iomem *cntbase) >>> +static void __arch_timer_determine_rate(u32 rate) >>> { >>> - /* Who has more than one independent system counter? */ >>> - if (arch_timer_rate) >>> - return; >>> + /* Check the timer frequency. */ >>> + if (!arch_timer_rate) { >>> + if (rate) >>> + arch_timer_rate = rate; >>> + else >>> + pr_warn("frequency not available\n"); >>> + } else if (rate && arch_timer_rate != rate) { >> >> ^ >> Typo? I think it's "&" here. > > Not a typo, It's definitely a “&&” :-) > > Here arch_timer_rate is not zero. > > If rate is not zero(that means we got a valid rate), and > arch_timer_rate != rate , > we will print warning message. Ah, misreading the code, thanks for clarify :) Hanjun