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Mon, 2 Nov 2026 10:54:30 +0000 Message-ID: <74511f6b-f5ff-498f-bf97-ebdc86c43d24@intel.com> Date: Mon, 2 Nov 2026 12:54:22 +0200 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/6] irq_work: Re-raise pending irq_work after system resume To: Peter Zijlstra CC: Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Alexander Shishkin , Jiri Olsa , "Ian Rogers" , James Clark , "Thomas Gleixner" , Borislav Petkov , Dave Hansen , , "H. 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Wysocki" , Pavel Machek , Greg Kroah-Hartman , "Danilo Krummrich" , Johan Hovold , "Sebastian Andrzej Siewior" , Mathieu Desnoyers , Jiayuan Chen , "Steven Rostedt (Google)" , "Vineeth Pillai (Google)" , Frederic Weisbecker , "Andi Kleen" , , , , References: <20261102074039.26983-1-adrian.hunter@intel.com> <20261102074039.26983-2-adrian.hunter@intel.com> <20261102090604.GR1779021@noisy.programming.kicks-ass.net> Content-Language: en-US From: Adrian Hunter Organization: Intel Finland Oy, Registered Address: c/o Alberga Business Park, 6 krs, Bertel Jungin Aukio 5, 02600 Espoo, Business Identity Code: 0357606 - 4, Domiciled in Helsinki In-Reply-To: <20261102090604.GR1779021@noisy.programming.kicks-ass.net> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: DUZPR01CA0293.eurprd01.prod.exchangelabs.com (2603:10a6:10:4b7::7) To IA1PR11MB7198.namprd11.prod.outlook.com (2603:10b6:208:419::15) X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: IA1PR11MB7198:EE_|DS7PR11MB9473:EE_ X-MS-Office365-Filtering-Correlation-Id: adc46c36-d25a-4b01-653c-08df38cfac29 X-LD-Processed: 46c98d88-e344-4ed4-8496-4ed7712e255d,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|1800799024|366016|23010399003|6133799003|10067099003|22082099003|18002099003|56012099006|5023799004|4143699003|11063799006|261021121427099003|261026121527099003|261022105027099003|261026140227099003|261022075727099003|261009223027099003|261028144727099003; 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Once raised_list is non-empty, further >> queueing assumes the interrupt is already pending and will eventually >> process the list. >> >> That assumption can fail across system suspend. irq_work queued after >> arch_suspend_disable_irqs() and before the interrupt controller is >> suspended, for example from NMI context, may leave its self-interrupt >> pending in hardware. If that pending interrupt state is lost during >> suspend, hibernation restore, or kexec jump, raised_list remains >> non-empty after resume but nothing will process it. >> >> Subsequent irq_work added to raised_list will not raise another >> interrupt because the list is already non-empty. Architectures that use >> an irq_work interrupt and do not process raised_list from the tick can >> therefore leave irq_work pending indefinitely. A caller waiting in >> irq_work_sync() may then spin forever, for example when closing a perf >> event whose pending irq_work never executes. >> >> For suspend, hibernation, and kexec jump, only the CPU that remains >> online is affected. The other CPUs are taken offline beforehand, and >> smpcfd_dying_cpu() runs irq_work_run() on each CPU before it is removed, >> so checking the local raised_list is sufficient. > > I thought here was a suspend2idle option where all the CPUs remain > online? Yes CPUs remain online for suspend2idle, but currently the choice between suspend2idle and "deep" (S3) suspend is a user space choice, refer /sys/power/mem_sleep. Many modern systems do not support S3 anymore, but it has not gone away. > > Anyway, I'm torn; I would much rather make this trigger a WARN and have AI now also identifies ftrace, BPF, GHES NMI, and #MC as possible causes, not just perf. I haven't tried to confirm any of those. And, belatedly, AI is now saying an irq_work raised before lapic_resume() might result in #GP if the APIC is left in xAPIC mode at resume. Also not confirmed. > suspend pause/resume perf in a more controlled manner. For fixing Intel PT though, it also needs to be suitable for stable.