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([2601:b051:12ac:a800:99cc:6547:8f68:3193]) by smtp.gmail.com with ESMTPSA id g9-20020a6b6b09000000b007ba84cb7860sm3159341ioc.4.2023.12.26.10.07.22 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 26 Dec 2023 10:07:23 -0800 (PST) Message-ID: <74649469-2b47-486e-b8d1-c89b705fe8c1@sifive.com> Date: Tue, 26 Dec 2023 12:07:21 -0600 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC 07/16] dt-bindings: clock: Add StarFive JH8100 North-West clock and reset generator Content-Language: en-US To: Sia Jee Heng Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, leyfoon.tan@starfivetech.com, kernel@esmil.dk, conor@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, mturquette@baylibre.com, sboyd@kernel.org, p.zabel@pengutronix.de, emil.renner.berthing@canonical.com, hal.feng@starfivetech.com, xingyu.wu@starfivetech.com References: <20231226053848.25089-1-jeeheng.sia@starfivetech.com> <20231226053848.25089-8-jeeheng.sia@starfivetech.com> From: Samuel Holland In-Reply-To: <20231226053848.25089-8-jeeheng.sia@starfivetech.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 2023-12-25 11:38 PM, Sia Jee Heng wrote: > Add bindings for the North-West clock and reset generator (NWCRG) on > JH8100 SoC. > > Signed-off-by: Sia Jee Heng > Reviewed-by: Ley Foon Tan > --- > .../bindings/clock/starfive,jh8100-nwcrg.yaml | 119 ++++++++++++++++++ > .../dt-bindings/clock/starfive,jh8100-crg.h | 43 +++++++ > .../dt-bindings/reset/starfive,jh8100-crg.h | 14 +++ > 3 files changed, 176 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh8100-nwcrg.yaml > > diff --git a/Documentation/devicetree/bindings/clock/starfive,jh8100-nwcrg.yaml b/Documentation/devicetree/bindings/clock/starfive,jh8100-nwcrg.yaml > new file mode 100644 > index 000000000000..be0f94e64e6a > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/starfive,jh8100-nwcrg.yaml > @@ -0,0 +1,119 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/starfive,jh8100-nwcrg.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: StarFive JH8100 North-West Clock and Reset Generator > + > +maintainers: > + - Sia Jee Heng > + > +properties: > + compatible: > + const: starfive,jh8100-nwcrg > + > + reg: > + maxItems: 1 > + > + clocks: > + items: > + - description: Main Oscillator (24 MHz) > + - description: APB_BUS clock from SYSCRG > + - description: APB_BUS_PER4 clock from SYSCRG > + - description: SPI_CORE_100 clock from SYSCRG > + - description: ISP_2X clock from SYSCRG > + - description: ISP_AXI clock from SYSCRG > + - description: VOUT_ROOT0 clock from SYSCRG > + - description: VOUT_ROOT1 clock from SYSCRG > + - description: VOUT_SCAN_ATS clock from SYSCRG > + - description: VOUT_DC_CORE clock from SYSCRG > + - description: VOUT_AXI clock from SYSCRG > + - description: AXI_400 clock from SYSCRG > + - description: AHB0 clock from SYSCRG > + - description: PERH_ROOT_PREOSC from SYSCRG > + - description: External DVP clock > + - description: External ISP DPHY TAP TCK clock > + - description: External golbal clock Typo: global > + - description: External VOUT MIPI DPHY TAP TCK > + - description: External VOUT eDP TAP TCK > + - description: External SPI In2 clock > + - description: PLL5 > [...]