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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-aac0e82f858sm1501596766b.21.2024.12.30.08.06.40 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 30 Dec 2024 08:06:42 -0800 (PST) Message-ID: <7465404d-da79-4cb1-a3c6-0e88cf024e0f@oss.qualcomm.com> Date: Mon, 30 Dec 2024 17:06:40 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 5/6] arm64: dts: qcom: x1e80100: Add CCI definitions To: Bryan O'Donoghue , Loic Poulain , Robert Foss , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Todor Tomov , Mauro Carvalho Chehab , Bjorn Andersson , Michael Turquette , Stephen Boyd , Vladimir Zapolskiy , Jagadeesh Kona , Konrad Dybcio Cc: linux-i2c@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-clk@vger.kernel.org References: <20241227-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v2-0-06fdd5a7d5bb@linaro.org> <20241227-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v2-5-06fdd5a7d5bb@linaro.org> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20241227-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v2-5-06fdd5a7d5bb@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: DfCn7ttLxkMjIbzz2_FFWR_y_KG0lSRP X-Proofpoint-ORIG-GUID: DfCn7ttLxkMjIbzz2_FFWR_y_KG0lSRP X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 malwarescore=0 bulkscore=0 lowpriorityscore=0 mlxlogscore=761 adultscore=0 clxscore=1015 impostorscore=0 priorityscore=1501 suspectscore=0 phishscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412300139 On 27.12.2024 2:11 PM, Bryan O'Donoghue wrote: > Add in 2 CCI busses. One bus has two CCI bus master pinouts: > cci_i2c_scl0 = gpio101 > cci_i2c_sda0 = gpio102 > cci_i2c_scl1 = gpio103 > cci_i2c_sda1 = gpio104 > > A second bus has a single CCI bus master pinout: > cci_i2c_scl2 = gpio105 > cci_i2c_sda2 = gpio106 > > Signed-off-by: Bryan O'Donoghue > --- Reviewed-by: Konrad Dybcio Konrad