From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.zytor.com (terminus.zytor.com [198.137.202.136]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8F6CB3085CC; Wed, 18 Jun 2025 21:56:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.137.202.136 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750283798; cv=none; b=q6M2jXi/I7LE4yts+2GOfOKgLwmUNF5cIipB4B7/a7AFfzyAxYzEhek9yZVKsPHh2WsQPSj7b60sOctkAOUU9tNbT3oWROChIMH46IX4kt7m81tBsHcmpKPVj3pB8ps3uMxKPo9kRC3s8Lj4mFP5Rwtr9hGnR4g+lsBI79HDx7Y= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750283798; c=relaxed/simple; bh=fvGXz+xNX9iaAxQSDogvOS9k/q/JBZr5AdCHaYNG6SE=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=eEQDrt1JvOUThzPyuxo8nW2Sks+AI5MEwAXgYSbv74co+nHb4BzFaAMGJqzQ2L3/ETc/8xcP7YjxXcNd9xvBD19RAMQeJPi8vUEmMeSQYf+dj4DH3xndjJ/RbfWhTVuImRiedm8xm7LhlNAczZ1gSpLVPnD+37RKNDQ/Rits/mc= ARC-Authentication-Results:i=1; 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h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=vRL+VCfQycs+GcU0imW3RUyWg8xb229EJz1tZwBR5mf4snuLeT9XiKGaRYV/fhBBQ TdZQE/L2zr7zpkWgKxMmVAicPQi67sb9NjXuP4KLma3XLQYG1YAsn8mq2PPlK4PG7D reA1ARtulk8Pt+W22Cl+0IJ+NILbtbI+FgV4aWUGlzCjjsI008pBGcjGlezBDhD2tF +NlOjRxVpasWwcYXmkDjV0HgODxIYOJS5Vsv8rnT1W0Oyh9v2fByTVDHiYWOYKxDf3 MObAYl86SlrO4JjY4wtMn2D8jRBwX5unl3TTe3kYE98obV+zS7YBedx8buwICMtj6r 19z//CHW1iJkg== Message-ID: <7480bb12-60a5-45ab-acb5-14f35c3f4782@zytor.com> Date: Wed, 18 Jun 2025 14:55:55 -0700 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/2] x86/traps: Initialize DR6 by writing its architectural reset value To: Sean Christopherson Cc: Sohil Mehta , linux-kernel@vger.kernel.org, kvm@vger.kernel.org, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, pbonzini@redhat.com, peterz@infradead.org, brgerst@gmail.com, tony.luck@intel.com, fenghuay@nvidia.com References: <20250617073234.1020644-1-xin@zytor.com> <20250617073234.1020644-2-xin@zytor.com> <25896236-de8d-4bd9-8a27-da407c0e5a38@zytor.com> Content-Language: en-US From: Xin Li Autocrypt: addr=xin@zytor.com; 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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 6/18/2025 2:24 PM, Sean Christopherson wrote: > On Tue, Jun 17, 2025, Xin Li wrote: >> On 6/17/2025 1:47 PM, Sean Christopherson wrote: >>> On Tue, Jun 17, 2025, Sohil Mehta wrote: >>> Note, DR6_VOLATILE and DR6_FIXED_1 aren't necessarily aligned with the current >>> architectural definitions (I haven't actually checked), >> >> I'm not sure what do you mean by "architectural definitions" here. > > I was trying to say that there may be bits that have been defined in the SDM, > but are not yet makred as "supported" in DR6_VOLATILE, i.e. that are "incorrectly" > marked as DR6_FIXED_1 (in quotes, because from KVM's perspective, the bits *are* > fixed-1, for the guest). Clear for me now, thanks for the explanation. Wanted to echo that it's necessary to be in a KVM mindset sometimes. > >> However because zeroing DR6 leads to different DR6 values depending on >> whether the CPU supports BLD: >> >> 1) On CPUs with BLD support, DR6 becomes 0xFFFF07F0 (bit 11, DR6.BLD, >> is cleared). >> >> 2) On CPUs without BLD, DR6 becomes 0xFFFF0FF0. >> >> DR6_FIXED_1, if it is still defined to include all bits that can't be >> cleared, is a constant value only on a *specific* CPU architecture, >> i.e., it is not a constant value on all CPU implementations. >> >> >>> rather they are KVM's >>> view of the world, i.e. what KVM supports from a virtualization perspective. >> >> So KVM probably should expose the fixed 1s in DR6 to the guest depending on >> which features, such as BLD or RTM, are enabled and visible to the >> guest or not? >> >> (Sorry I haven't looked into how the macro DR6_FIXED_1 is used in KVM, >> maybe it's already used in such a way) > > Yep, that's exactly what KVM does. DR6_FIXED_1 is the set of bits that KVM > doesn't yet support for *any* guest. The per-vCPU set of a fixed-1 bits starts > with DR6_FIXED_1, and adds in bits for features that aren't supported/exposed > to the guest. > > static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu) > { > u64 fixed = DR6_FIXED_1; > > if (!guest_cpu_cap_has(vcpu, X86_FEATURE_RTM)) > fixed |= DR6_RTM; > > if (!guest_cpu_cap_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT)) > fixed |= DR6_BUS_LOCK; > return fixed; > } Excellent! KVM is aware of BLD and behaves the same as real hardware, doing a better job than native regarding this specific case.